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TSC87C52-16CHR PDF预览

TSC87C52-16CHR

更新时间: 2024-09-29 13:34:51
品牌 Logo 应用领域
TEMIC 可编程只读存储器时钟ATM异步传输模式微控制器外围集成电路
页数 文件大小 规格书
24页 181K
描述
Microcontroller, 8-Bit, OTPROM, 16MHz, CMOS, CQCC44, LCC-44

TSC87C52-16CHR 技术参数

生命周期:Transferred包装说明:LCC-44
Reach Compliance Code:unknown风险等级:5.59
具有ADC:NO地址总线宽度:16
位大小:8最大时钟频率:16 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:8JESD-30 代码:S-PQCC-N44
I/O 线路数量:32端子数量:44
最高工作温度:70 °C最低工作温度:
PWM 通道:NO封装主体材料:PLASTIC/EPOXY
封装形状:SQUARE封装形式:CHIP CARRIER
认证状态:Not QualifiedROM可编程性:OTPROM
速度:16 MHz最大压摆率:25 mA
最大供电电压:5.5 V最小供电电压:4.5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子位置:QUADuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

TSC87C52-16CHR 数据手册

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TSC87C52  
CMOS 0 to 33 MHz Programmable 8–bit Microcontroller  
Description  
TEMIC’s TSC87C52 is high performance CMOS  
EPROM version of the 80C52 CMOS single chip 8 bit  
microcontroller.  
structure; a full duplex serial port with framing error  
detection; a power off flag; and an on-chip oscillator.  
The TSC87C52 has 2 software-selectable modes of  
reduced activity for further reduction in power  
consumption. In the idle mode the CPU is frozen while  
the RAM, the timers, the serial port and the interrupt  
system continue to function. In the power down mode  
the RAM is saved and all other functions are inoperative.  
The fully static design of the TSC87C52 allows to  
reduce system power consumption by bringing the clock  
frequency down to any value, even DC, without loss of  
data.  
The TSC87C52 is manufactured using non volatile  
SCMOS process which allows it to run up to:  
The TSC87C52 retains all the features of the 80C52 with  
some enhancement: 8 K bytes of internal code memory  
(EPROM); 256 bytes of internal data memory (RAM);  
32 I/O lines; three 16 bit timers one with count–down  
and clock–out capability; a 6-source, 2-level interrupt  
D
D
33 MHz with VCC = 5 V ± 10%.  
16 MHz with 2.7 V < VCC < 5.5 V.  
Features  
D
8 Kbytes of EPROM  
D
D
D
D
0.8µ SCMOS non volatile process  
ONCE Mode  
G
Improved Quick Pulse programming algorithm  
Secret ROM by encryption  
G
Enhanced Hooks system for emulation purpose  
Available temperature ranges:  
D
D
D
D
D
256 bytes of RAM  
64 Kbytes program memory space  
64 Kbytes data memory space  
32 programmable I/O lines  
G
commercial  
industrial  
G
G
automotive  
D
Available packages:  
Three 16 bit timer/counters including enhanced  
timer 2  
G
PDIP40 (OTP)  
G
G
G
G
G
G
PLCC44 (OTP)  
D
Programmable serial port with framing error  
detection  
VQFP44 (OTP)  
CQPJ44 (UV erasable)  
CERDIP40 (UV erasable)  
CQPJ44 (OTP)  
D
D
D
Power control modes  
Two–level interrupt priority  
Fully static design  
CDIL40 (OTP)  
1
Rev. D – December 14, 1998  

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