TPS62202

更新时间： 2024-02-29 16:28:49

品牌	Logo	应用领域
德州仪器 - TI		转换器功效 DC-DC转换器
页数	文件大小	规格书
19页	257K
描述
HIGH-EFFICIENCY, SOT23 STEP-DOWN, DC-DC CONVERTER

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TPS62202 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOT-23
包装说明：	LSSOP,	针数：	5
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	Factory Lead Time：	1 week
风险等级：	0.81	其他特性：	PFM MODE ALSO AVAILABLE
模拟集成电路 - 其他类型：	SWITCHING REGULATOR	控制模式：	VOLTAGE-MODE
控制技术：	PULSE WIDTH MODULATION	最大输入电压：	6 V
最小输入电压：	2.5 V	标称输入电压：	3.6 V
JESD-30 代码：	R-PDSO-G5	JESD-609代码：	e4
长度：	2.9 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	5
最高工作温度：	85 °C	最低工作温度：	-40 °C
最大输出电流：	0.67 A	最大输出电压：	1.8 V
最小输出电压：	1.8 V	封装主体材料：	PLASTIC/EPOXY
封装代码：	LSSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	1.45 mm
表面贴装：	YES	切换器配置：	BUCK
最大切换频率：	1500 kHz	温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	GULL WING
端子节距：	0.95 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	1.6 mm
Base Number Matches：	1

TPS62202 数据手册

TPS62200, TPS62201

TPS62202, TPS62203

TPS62204, TPS62205

SLVS417B – MARCH 2002 – REVISED OCTOBER 2002

detailed description

operation

TheTPS6220xisasynchronousstep-downconverteroperatingwithtypically1MHzfixedfrequencypulsewidth

modulation (PWM) at moderate to heavy load currents and in power save mode operating with pulse frequency

modulation (PFM) at light load currents.

During PWM operation the converter uses a unique fast response, voltage mode, controller scheme with input

voltage feed forward. This achieves good line and load regulation and allows the use of small ceramic input

and output capacitors. At the beginning of each clock cycle initiated by the clock signal (S), the P-channel

MOSFET switch is turned on, and the inductor current ramps up until the comparator trips and the control logic

turns off the switch. The current limit comparator also turns off the switch in case the current limit of the

P-channel switch is exceeded. Then the N-channel rectifier switch is turned on and the inductor current ramps

down. The next cycle is initiated by the clock signal again turning off the N-channel rectifier and turning on the

P-channel switch.

The GM amplifier and input voltage determines the rise time of the Sawtooth generator; therefore any change

in input voltage or output voltage directly controls the duty cycle of the converter. This gives a very good line

and load transient regulation.

power save mode operation

As the load current decreases, the converter enters the power save mode operation. During power save mode,

the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current

to maintain high efficiency.

Two conditions allow the converter to enter the power save mode operation. One is when the converter detects

the discontinuous conduction mode. The other is when the peak switch current in the P-channel switch goes

below the skip current limit. The typical skip current limit can be calculated as

Vin

160 W

v 66 mA )

skip

During the power save mode the output voltage is monitored with the comparator by the thresholds comp low

and comp high. As the output voltage falls below the comp low threshold set to typically 0.8% above Vout

nominal, theP-channelswitchturnson. TheP-channelswitchisturnedoffasthepeakswitchcurrentisreached.

The typical peak switch current can be calculated:

Vin

80 W

+ 66 mA )

peak

The N-channel rectifier is turned on and the inductor current ramps down. As the inductor current approaches

zero the N-channel rectifier is turned off and the P-channel switch is turned on again, starting the next pulse.

The converter continues these pulses until the comp high threshold (set to typically 1.6% above Vout nominal)

is reached. The converter enters a sleep mode, reducing the quiescent current to a minimum. The converter

wakes up again as the output voltage falls below the comp low threshold again. This control method reduces

the quiescent current typically to 15 µA and reduces the switching frequency to a minimum, thereby achieving

the high converter efficiency. Setting the skip current thresholds to typically 0.8% and 1.6% above the nominal

output voltage at light load current results in a dynamic output voltage achieving lower absolute voltage drops

during heavy load transient changes. This allows the converter to operate with a small output capacitor of just

10 µF and still have a low absolute voltage drop during heavy load transient changes. Refer to Figure 2 for

detailed operation of the power save mode.

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