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TP83C251 PDF预览

TP83C251

更新时间: 2024-01-20 23:52:20
品牌 Logo 应用领域
英特尔 - INTEL 微控制器
页数 文件大小 规格书
36页 408K
描述
HIGH-PERFORMANCE CHMOS MICROCONTROLLER

TP83C251 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:40
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.84具有ADC:NO
地址总线宽度:16位大小:8
最大时钟频率:16 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:8
JESD-30 代码:R-PDIP-T40长度:52.26 mm
I/O 线路数量:32端子数量:40
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
ROM可编程性:MROM座面最大高度:5.08 mm
速度:12 MHz表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:15.24 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER

TP83C251 数据手册

 浏览型号TP83C251的Datasheet PDF文件第2页浏览型号TP83C251的Datasheet PDF文件第3页浏览型号TP83C251的Datasheet PDF文件第4页浏览型号TP83C251的Datasheet PDF文件第5页浏览型号TP83C251的Datasheet PDF文件第6页浏览型号TP83C251的Datasheet PDF文件第7页 
PRELIMINARY  
8XC251SA/SB/SP/SQ  
HIGH-PERFORMANCE  
CHMOS MICROCONTROLLER  
Commercial/Express  
Real-time and Programmed Wait State  
Bus Operation  
User-selectable Configurations:  
— External Wait States (0-3 wait states)  
— Address Range & Memory Mapping  
— Page Mode  
®
Binary-code Compatible with MCS 51  
Pin Compatible with 44-pin PLCC and 40-  
pin PDIP MCS 51 Sockets  
32 Programmable I/O Lines  
®
Register-based MCS 251 Architecture  
Seven Maskable Interrupt Sources  
with Four Programmable Priority  
Levels  
— 40-byte Register File  
— Registers Accessible as Bytes, Words,  
or Double Words  
Three Flexible 16-bit Timer/counters  
Hardware Watchdog Timer  
Programmable Counter Array  
— High-speed Output  
Enriched MCS 51 Instruction Set  
— 16-bit and 32-bit Arithmetic and Logic  
Instructions  
— Compare and Conditional Jump  
Instructions  
— Compare/Capture Operation  
— Pulse Width Modulator  
— Expanded Set of Move Instructions  
— Watchdog Timer  
Linear Addressing  
Programmable Serial I/O Port  
— Framing Error Detection  
256-Kbyte Expanded External Code/Data  
Memory Space  
ROM/OTPROM/EPROM Options:  
16 Kbytes (SB/SQ), 8 Kbytes (SA/SP), or  
without ROM/OTPROM/EPROM  
— Automatic Address Recognition  
High-performance CHMOS Technology  
Static Standby to 16-MHz Operation  
16-bit Internal Code Fetch  
Complete System Development  
64-Kbyte Extended Stack Space  
Support  
On-chip Data RAM Options:  
— Compatible with Existing Tools  
1-Kbyte (SA/SB) or 512-Byte (SP/SQ)  
— New MCS 251 Tools Available:  
8-bit, 2-clock External Code Fetch in  
Compiler, Assembler, Debugger, ICE  
Page Mode  
Fast MCS 251 Instruction Pipeline  
Package Options (PDIP, PLCC, and  
Ceramic DIP)  
A member of the Intel family of 8-bit MCS 251 microcontrollers, the 8XC251SA/SB/SP/SQ is binary-code  
compatible with MCS 51 microcontrollers and pin compatible with 40-pin PDIP and 44-pin PLCC MCS 51  
microcontrollers. MCS 251 microcontrollers feature an enriched instruction set, linear addressing, and  
efficient C-language support. The 8XC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip RAM and is  
available with 8 Kbytes or 16 Kbytes of on-chip ROM/OTPROM/EPROM, or without ROM/OTPROM/EPROM.  
A variety of features can be selected by new user-programmable configurations.  
COPYRIGHT © INTEL CORPORATION, 1996  
May 1996  
Order Number: 272783-003  

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