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TOP222GN

更新时间： 2024-02-14 01:04:11
品牌 Logo 应用领域
帕沃英蒂格盛 - POWERINT 开关光电二极管
页数 文件大小 规格书
20页 1537K
描述
Three-Terminal Off-Line PWM Switch

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TOP222GN 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP,
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
Factory Lead Time：14 weeks风险等级：8.37
模拟集成电路 - 其他类型：SWITCHING REGULATOR控制模式：VOLTAGE-MODE
控制技术：PULSE WIDTH MODULATIONJESD-30 代码：R-PDSO-G8
JESD-609代码：e3长度：9.59 mm
湿度敏感等级：4功能数量：1
端子数量：8最高工作温度：125 °C
最低工作温度：-40 °C最大输出电流：0.55 A
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：250认证状态：Not Qualified
座面最大高度：3.73 mm表面贴装：YES
切换器配置：BOOST最大切换频率：110 kHz
技术：CMOS温度等级：AUTOMOTIVE
端子面层：PURE MATTE TIN端子形式：GULL WING
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：6.35 mm
Base Number Matches：1

TOP222GN 数据手册

 浏览型号TOP222GN的Datasheet PDF文件第2页浏览型号TOP222GN的Datasheet PDF文件第3页浏览型号TOP222GN的Datasheet PDF文件第4页浏览型号TOP222GN的Datasheet PDF文件第6页浏览型号TOP222GN的Datasheet PDF文件第7页浏览型号TOP222GN的Datasheet PDF文件第8页 
TOP221-227  
V
IN  
V
IN  
0
DRAIN  
V
OUT  
0
0
I
OUT  
• • •  
• • •  
V
V
C
C(reset)  
0
0
• • •  
• • •  
I
C
Figure 6. Typical Waveforms for (1) Normal Operation, (2) Auto-restart, and (3) Power Down Reset.  
The leading edge blanking circuit inhibits the current limit  
comparator for a short time after the output MOSFET is  
turned on. The leading edge blanking time has been set so  
that current spikes caused by primary-side capacitances  
and secondary-side rectifier reverse recovery time will not  
cause premature termination of the switching pulse.  
Overtemperature Protection  
Temperature protection is provided by a precision analog  
circuit that turns the output MOSFET off when the junction  
temperature exceeds the thermal shutdown temperature  
(typically 135 °C). Activating the power-up reset circuit by  
removing and restoring input power or momentarily pulling  
the CONTROL pin below the power-up reset threshold resets  
the latch and allows TOPSwitch to resume normal power  
supply operation. VC is regulated in hysteretic mode and a  
4.7 V to 5.7 V (typical) sawtooth waveform is present on the  
CONTROL pin when the power supply is latched off.  
The current limit can be lower for a short period after the  
leading edge blanking time as shown in Figure 12. This is  
due to dynamic characteristics of the MOSFET. To avoid trig-  
gering the current limit in normal operation, the drain current  
waveform should stay within the envelope shown.  
High-Voltage Bias Current Source  
This current source biases TOPSwitch from the DRAIN pin  
and charges the CONTROL pin external capacitance (CT)  
during start-up or hysteretic operation. Hysteretic opera-  
tion occurs during auto-restart and overtemperature latched  
shutdown. The current source is switched on and off with an  
effective duty cycle of approximately 35%. This duty cycle  
is determined by the ratio of CONTROL pin charge (IC) and  
discharge currents (ICD1 and ICD2). This current source is  
turned off during normal operation when the output MOSFET  
is switching.  
Shutdown/Auto-restart  
To minimize TOPSwitch power dissipation, the shutdown/  
auto-restart circuit turns the power supply on and off at an  
auto-restart duty cycle of typically 5% if an out of regulation  
condition persists. Loss of regulation interrupts the external  
current into the CONTROL pin. VC regulation changes from  
shunt mode to the hysteretic auto-restart mode described  
above. When the fault condition is removed, the power sup-  
ply output becomes regulated, VC regulation returns to shunt  
mode, and normal operation of the power supply resumes.  
5
Rev. G 08/16  
www.power.com  
12345678...20

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