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TN0606

更新时间: 2024-02-15 10:07:10
品牌 Logo 应用领域
超科 - SUPERTEX /
页数 文件大小 规格书
4页 34K
描述
N-Channel Enhancement-Mode Vertical DMOS FETs

TN0606 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIE包装说明:UNCASED CHIP, S-XUUC-N3
针数:3Reach Compliance Code:unknown
ECCN代码:EAR99风险等级:5.71
其他特性:LOW THRESHOLD配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:60 V最大漏源导通电阻:1.5 Ω
FET 技术:METAL-OXIDE SEMICONDUCTOR最大反馈电容 (Crss):35 pF
JESD-30 代码:S-XUUC-N3JESD-609代码:e0
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:UNSPECIFIED封装形状:SQUARE
封装形式:UNCASED CHIP峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL认证状态:Not Qualified
子类别:FET General Purpose Power表面贴装:YES
端子面层:TIN LEAD端子形式:NO LEAD
端子位置:UPPER处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

TN0606 数据手册

 浏览型号TN0606的Datasheet PDF文件第2页浏览型号TN0606的Datasheet PDF文件第3页浏览型号TN0606的Datasheet PDF文件第4页 
TN0606  
TN0610  
Low Threshold  
N-Channel Enhancement-Mode  
Vertical DMOS FETs  
Ordering Information  
BVDSS / RDS(ON) ID(ON) VGS(th)  
Order Number / Package  
BVDGS (max) (min) (max)  
TO-92  
TO-220  
TN0606N5  
60V  
1.5  
1.5Ω  
3.0A  
3.0A  
2.0V  
2.0V  
TN0606N3  
TN0610N3  
100V  
MIL visual screening available  
7
Low Threshold DMOS Technology  
Features  
These low threshold enhancement-mode (normally-off) transis-  
tors utilize a vertical DMOS structure and Supertex's well-proven  
silicon-gate manufacturing process. This combination produces  
devices with the power handling capabilities of bipolar transistors  
and with the high input impedance and positive temperature  
coefficient inherent in MOS devices. Characteristic of all MOS  
structures, these devices are free from thermal runaway and  
thermally-induced secondary breakdown.  
Low threshold — 2.0V max.  
High input impedance  
Low input capacitance — 100pF typical  
Fast switching speeds  
Low on resistance  
Free from secondary breakdown  
Low input and output leakage  
Complementary N- and P-channel devices  
Supertex’s vertical DMOS FETs are ideally suited to a wide range  
of switching and amplifying applications where very low threshold  
voltage, highbreakdownvoltage, highinputimpedance, lowinput  
capacitance, and fast switching speeds are desired.  
Applications  
Logic level interfaces – ideal for TTL and CMOS  
Package Options  
Solid state relays  
Battery operated systems  
Photo voltaic drives  
Analog switches  
General purpose line drivers  
Telecom switches  
G
D
S
S G D  
Absolute Maximum Ratings  
Drain-to-Source Voltage  
TO-220  
TAB: DRAIN  
TO-92  
BVDSS  
BVDGS  
± 20V  
Drain-to-Gate Voltage  
Gate-to-Source Voltage  
Operating and Storage Temperature  
Soldering Temperature*  
-55°C to +150°C  
Note:  
1. See Package Outline section for dimensions  
300°C  
* Distance of 1.6 mm from case for 10 seconds.  
7-51  

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