TMS320C511A
DIGITAL SIGNAL PROCESSOR
SPRS053 – FEBRUARY 1997
Powerful 16-Bit TMS320C511A CPU
Block Moves for Data/Program
Management
20-, 20.8-, and 21.7-ns Single-Cycle
Instruction Execution Time With 5-V
Operation
On-Chip Scan-Based Emulation Logic
100-Pin Quad Flat Package (PJ Suffix) and
100-Pin Thin Quad Flat Package (PZ Suffix)
Single-Cycle 16 × 16-Bit Multiply/Add
128K Words of Total Data/Program Space
Low-Power Dissipation and Power-Down
Modes:
– 47 mA (2.35 mA/MIPS) at 5 V, 40-MHz
Clock (Average)
– 3 mA at 5 V, 40-MHz Clock
(Typical IDLE2)
– 5 µA at 5 V, Clocks Off
(Typical STANDBY)
6 × 4K × 16-Bit Single-Access On-Chip
Program ROM
1K × 16-Bit Dual-Access On-Chip
Program/Data RAM
Full-Duplex Synchronous Serial Port for
Code/Decode (CODEC) Interface
Hardware or Software Wait-State
Generation Capability
High-Performance Static CMOS Technology
Databus Keepers
Repeat Instructions for Efficient Use of
Program Space
Multiply-by-Two and Divide-by-Two
Clocking Options
description
The TMS320C511A is a member of the ’C5x generation of the Texas Instruments (TI ) TMS320 digital signal
processors (DSPs). This device is fabricated with static CMOS integrated circuit technology, and its
architectural design is based on that of an earlier TI DSP, the TMS320C25. The combination of advanced
Harvard architecture, on-chip peripherals, on-chip memory, and a highly specialized instruction set is the basis
of the operational flexibility and speed of the ’C511A device. The ’C511A executes up to 50 MIPS (million
instructions per second).
The ’C5x generation DSPs, like the ’C511A, offer these advantages:
Enhanced TMS320 architecture for increased performance and versatility
Modular architecture for fast development of spin-off devices
Advanced integrated-circuit processing technology for increased performance
Source code for ’C1x and ’C2x DSPs is upward-compatible with ’C5x generation devices like the ’C511A
Enhanced TMS320 instruction set for faster algorithms and for optimized high-level language operation
New static-design techniques for minimizing power consumption and maximizing radiation hardness
Table 1 lists the characteristics of the ’C511A processor: the capacity of on-chip RAM and ROM, the number
of serial and parallel I/O ports, the execution time of one machine cycle, and the type of package with total pin
count.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TI is a trademark of Texas Instruments Incorporated.
Copyright 1997, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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