TGL2210-SM
®
0.05ꢀ–ꢀ6.0 GHz 100 Watt VPIN Limiter
Evaluation Board PCB Information and Mounting Detail
TUNED PCB LAYOUT
Tuning stub (mils)
29.2
229.2
29.9
MOUNTING PATTERN
RF layer is 0.008” thick Rogers RO4003C. Metal layers are 0.5-oz copper. Microstrip 50 Ω line width is 0.050”. The microstrip line taper
at the connector interface is optimized for the Southwest Microwave end-launch connector 1092-02A-5.
The pad pattern shown has been developed and tested for optimized assembly at Qorvo. The PCB land pattern has been developed to
accommodate lead and package tolerances. Since surface mount processes vary from company to company, careful process
development is recommended.
➢
➢
Ground / thermal vias under the DUT are critical for the proper performance of this device.
The PCB shown herein utilizes copper filled vias (10 mils diameter) under the DUT to maximize heat transfer away from the DUT
under large signal conditions.
➢
Thermal dissipation is low for normal non-limiting operation.
Data Sheet Rev. B, October 2, 2018 | Subject to change without notice
7 of 10
www.qorvo.com