Philips Semiconductors
Preliminary specification
Quasi-split sound processor for all standards
TDA3866
PINNING
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
AMIF1
AMIF2
CAGC
CAM
1
AM IF difference input 1 for L standard (32.4 MHz)
AM IF difference input 2 for L standard
charge capacitor for AGC (FM and AM)
charge capacitor for AM AGC
2
3
4
MODE
FM2R1
FM2R2
AF2
5
3-state input for standard select
6
reference circuit for FM2 (5.74 MHz)
reference circuit for FM2 (5,74 MHz)
AF2 output (AF out of 5.74 MHz)
7
8
AF1
9
AF1 output (AF out of 5.5 MHz or AM)
reference circuit for FM1 (5.5 MHz)
FM1R1
FM1R2
VC-R1
VC-R2
CAFAM
FM1I
CAF1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
reference circuit for FM1 (5.5 MHz)
reference circuit for the vision carrier (38.9 MHz)
reference circuit for the vision carrier (38.9 MHz)
DC-decoupling capacitor for AM demodulator (AF-AM)
intercarrier input for FM1 (5.5 MHz)
DC-decoupling capacitor for FM1 demodulator (AF1)
intercarrier output signal (5.5/5.74 MHz)
DC-decoupling capacitor for FM2 demodulator (AF2)
intercarrier input for FM2 (5.74 MHz)
ground (0 V)
ICO
CAF2
FM2I
GND
VP
+5 ... +8 V supply voltage
Cref
charge capacitor for reference voltage
IF difference input 1 for B/G standard (38.9 MHz)
IF difference input 2 for B/G standard (38.9 MHz)
FMIF1
FMIF2
Fig.2 Pin configuration.
January 1992
4