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TC74VHC139F_12 PDF预览

TC74VHC139F_12

更新时间: 2024-09-28 11:58:59
品牌 Logo 应用领域
东芝 - TOSHIBA 解码器
页数 文件大小 规格书
8页 230K
描述
Dual 2-to-4 Line Decoder

TC74VHC139F_12 数据手册

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TC74VHC139F/FT/FK  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHC139F,TC74VHC139FT,TC74VHC139FK  
Dual 2-to-4 Line Decoder  
TC74VHC139F  
TC74VHC139FT  
TC74VHC139FK  
The TC74VHC139 is an advanced high speed CMOS 2 to 4  
LINE DECODER/DEMULTIPLEXER fabricated with silicon  
gate C2MOS technology.  
It achieves the high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low power  
dissipation.  
The active low enable input can be used for gating or it can be  
used as a data input for demultiplexing applications.  
When the enable input is held High, all four outputs are fixed  
at a high logic level independent of the other inputs.  
An input protection circuit ensures that 0 to 5.5 V can be  
applied to the input pins without regard to the supply voltage.  
This device can be used to interface 5 V to 3 V systems and two  
supply systems such as battery back up. This circuit prevents  
device destruction due to mismatched supply and input voltages.  
Features  
High speed: t = 5.0 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
High noise immunity: V  
= V  
= 28% V  
NIH  
NIL CC (min)  
Power down protection is provided on all inputs.  
Balanced propagation delays: t t  
pLH  
pHL  
Wide operating voltage range: V  
= 2 V to 5.5 V  
CC (opr)  
Pin and function compatible with 74ALS139  
Pin Assignment  
Weight  
SOP16-P-300-1.27A  
TSSOP16-P-0044-0.65A  
VSSOP16-P-0030-0.50  
: 0.18 g (typ.)  
: 0.06 g (typ.)  
: 0.02 g (typ.)  
1G  
1A  
1
2
3
4
5
6
7
8
16  
V
CC  
15 2G  
14 2A  
1B  
1Y0  
13 2B  
1Y1  
1Y2  
12 2Y0  
11 2Y1  
10 2Y2  
1Y3  
GND  
9
2Y3  
(top view)  
1
2012-02-29  

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