TC74LVXC3245FS(E,F

更新时间： 2024-01-28 12:55:03

品牌	Logo	应用领域
东芝 - TOSHIBA		总线驱动器总线收发器逻辑集成电路光电二极管
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10页	200K
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TC74LVXC3245FS

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74LVXC3245FS

Dual Supply Octal Configurable Voltage Interface Bus Transceiver

The TC74LVXC3245FS is a dual supply, advanced high-speed

CMOS octal configurable voltage interface bus transceiver

fabricated with silicon gate CMOS technology.

Designed for use as an interface between a 3.3 V bus and a 3.3V

to 5 V bus in mixed 3.3 V/5 V supply systems’ it achieves

high-speed operation while maintaining the CMOS low power

dissipation.

It is intended for 2 way asynchronous communication between

data busses.

The direction of data transmission is determined by the level of the

DIR input. The enable input ( G ) can be used to disable the device

so that the buses are effectively isolated. The A-port interfaces with

the 3.3-V bus, the B-port with the 3.3V to 5V bus. This device will

Weight: 0.14 g (typ.)

allow the V

voltage source pin and I/O pins on the B port to float when G is “H”.

CCB

All inputs are equipped with protection circuits against static discharge or transient excess voltage.

Features

•

Bi-directional interface between 3 V and 5 V buses

High-speed: t = 8.5 ns (max)

CCA

= 3.3 V, V

= 5.0 V)

CCB

•

Low power dissipation: I

= 8 μA (max) (Ta = 25°C)

Symmetrical output impedance:

= ±24 mA (min)

OUTA

OUTB

CCA

= V

= 3.0 V)

CCB

•

Low noise: V

= 1.5 V (max)

OLP

Flexible V

operating range

CCB

Allows B port and V

to float simultaneously when G is “H”

CCB

Package: SSOP (shrink small outline package)

Note: Do not apply a signal to any bus pins when it is in the output mode. Damage may result.

All floating (high impedance) bus pin must have their input levels fixed by means of pull-up or pull-down

resistors.

2007-10-17

12 3 4 5 6 7...10

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