Datasheet > TC74HC279AF(F)

TC74HC279AF(F)

更新时间： 2024-09-28 21:15:15

品牌	Logo	应用领域
东芝 - TOSHIBA		/
页数	文件大小	规格书
8页	246K
描述
TC74HC279AF(F)

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中文翻译

获取价格

技术参数
数据手册

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TC74HC279AF(F) 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	,	Reach Compliance Code：	unknown
风险等级：	5.84	Base Number Matches：	1

TC74HC279AF(F) 数据手册

TC74HC279AP/AF

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74HC279AP,TC74HC279AF

Quad S-R Latch

The TC74HC279A is a high speed CMOS QUAD S-R LATCH

fabricated with silicon gate C²MOS technology.

TC74HC279AP

It achieves the high speed operation similar to equivalent

LSTTL while maintaining the CMOS low power dissipation.

Each latch has an independent Q output and Set and Reset

inputs. S and R are active low. When S input is low, the Q

output goes high and when R input is low, the Q output goes

low. When both S and R are low, S takes precedence

resulting Q = low. When both of S and R are held high, Q

output doesn’t change.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

TC74HC279AF

Features

•

High speed: t = 12 ns (typ.) at V

= 5 V

Low power dissipation: I

= 2 μA (max) at Ta = 25°C

High noise immunity: V

= V

= 28% V

(min)

NIH

NIL

Symmetrical output impedance: |I | = I

= 4 mA (min)

∼

−

Balanced propagation delays: t

pHL

pLH

Weight

DIP16-P-300-2.54A

SOP16-P-300-1.27A

Wide operating voltage range: V

(opr) = 2 to 6 V

: 1.00 g (typ.)

: 0.18 g (typ.)

Pin and function compatible with 74LS279

Pin Assignment

2007-10-01

12 3 4 5 6 7 8

中文翻译

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