Datasheet > TC74AC74F_07

TC74AC74F_07

更新时间： 2024-09-30 05:04:11

品牌	Logo	应用领域
东芝 - TOSHIBA		触发器
页数	文件大小	规格书
10页	275K
描述
CMOS Digital Integrated Circuit Silicon Monolithic Dual D-Type Flip Flop with Preset and Clear

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中文翻译

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数据手册

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TC74AC74F_07 数据手册

TC74AC74P/F/FN/FT

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74AC74P,TC74AC74F,TC74AC74FN,TC74AC74FT

Dual D-Type Flip Flop with Preset and Clear

Note: xxxFN (JEDEC SOP) is not available in

Japan.

TC74AC74P

The TC74AC74 is an advanced high speed CMOS D-FLIP

FLOP fabricated with silicon gate and double-layer metal wiring

C²MOS technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

The signal level applied to the D INPUT is transferred to Q

OUTPUT during the positive going transition of the CK pulse.

CLR and PR are independent of the CK and are

accomplished by setting the appropriate input to an “L” level.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

TC74AC74F

TC74AC74FN

TC74AC74FT

Features

•

High speed: f

= 200 MHz (typ.) at V

= 5 V

max

Low power dissipation: I

= 4 μA (max) at Ta = 25°C

High noise immunity: V

= V

= 28% V

(min)

NIH

NIL

Symmetrical output impedance: |I | = I

= 24 mA (min)

Capability of driving 50 Ω

transmission lines.

∼

−

pHL

•

Balanced propagation delays: t

pLH

Wide operating voltage range: V

= 2 V to 5.5 V

CC (opr)

Pin and function compatible with 74F74

Weight

DIP14-P-300-2.54

SOP14-P-300-1.27A

SOL14-P-150-1.27

TSSOP14-P-0044-0.65A

: 0.96 g (typ.)

: 0.18 g (typ.)

: 0.12 g (typ.)

: 0.06 g (typ.)

2007-10-01

12 3 4 5 6 7...10

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