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TBS6416B4E-7G PDF预览

TBS6416B4E-7G

更新时间: 2024-01-17 16:45:32
品牌 Logo 应用领域
其他 - ETC 动态存储器
页数 文件大小 规格书
8页 225K
描述
1M x 16Bit x 4 Banks synchronous DRAM

TBS6416B4E-7G 数据手册

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M
.tec  
TBS6416B4E  
1M x 16Bit x 4 Banks synchronous DRAM  
GENERAL DESCRIPTION  
The TBS6416B4E is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by 16 bits,  
fabricated with M’tec high performance CMOS technology. Synchronous design allows precise cycle control with the use of  
system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and  
programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system  
applications.  
FEATURES  
JEDEC standard 3.3V power supply  
• LVTTL compatible with multiplexed address  
• Four-banks operation  
• MRS cycle with address key programs  
-. CAS latency (2 & 3)  
-. Burst length (1, 2, 4, 8 & Full page)  
-. Burst type (Sequential & Interleave)  
All inputs are sampled at the positive going edge of the system clock.  
• Burst read single-bit write operation  
• DQM for masking  
• Auto & self refresh  
• 64ms refresh period (4K cycle)  
ORDERING INFORMATION  
Part No.  
Max Freq.  
143MHz  
Interface  
LVTTL  
Package  
54  
TBS6416B4E-7G  
TSOP(II)  
Revision_1.1  
1 TwinMOS Technologies Inc. Sep. 2000  

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