T89C51RD2
0 to 40MHz Flash Programmable 8-bit Microcontroller
1. Description
ATMEL Wireless and Microcontrollers T89C51RD2 is mechanism (X2 mode). Pinout is either the standard 40/
high performance CMOS Flash version of the 80C51 44 pins of the C52 or an extended version with 6 ports
CMOS single chip 8-bit microcontroller. It contains a in a 64/68 pins package.
64 Kbytes Flash memory block for program and for data.
The fully static design of the T89C51RD2 allows to
The 64 Kbytes Flash memory can be programmed either reduce system power consumption by bringing the clock
in parallel mode or in serial mode with the ISP capability frequency down to any value, even DC, without loss of
or with software. The programming voltage is internally data.
generated from the standard V pin.
CC
The T89C51RD2 has 2 software-selectable modes of
The T89C51RD2 retains all features of the ATMEL reduced activity for further reduction in power
Wireless and Microcontrollers 80C52 with 256 bytes of consumption. In the idle mode the CPU is frozen while
internal RAM, a 7-source 4-level interrupt controller and the peripherals and the interrupt system are still
three timer/counters.
operating. In the power-down mode the RAM is saved
and all other functions are inoperative.
In addition, the T89C51RD2 has a Programmable
Counter Array, an XRAM of 1024 bytes, an EEPROM The added features of the T89C51RD2 makes it more
of 2048 bytes, a Hardware Watchdog Timer, a more powerful for applications that need pulse width
versatile serial channel that facilitates multiprocessor modulation, high speed I/O and counting capabilities
communication (EUART) and a speed improvement such as alarms, motor control, corded phones, smart card
readers.
2. Features
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80C52 Compatible
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Dual Data Pointer
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8051 pin and instruction compatible
Four 8-bit I/O ports (or 6 in 64/68 pins packages)
Three 16-bit timer/counters
Variable length MOVX for slow RAM/peripherals
Improved X2 mode with independant selection for
CPU and each peripheral
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2 k bytes EEPROM block for data storage
256 bytes scratch pad RAM
7 Interrupt sources with 4 priority levels
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100K Write cycle
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ISP (In System Programming) using standard V
power supply.
Programmable Counter Array with:
CC
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High Speed Output,
Boot FLASH contains low level FLASH
programming routines and a default serial loader
Compare / Capture,
Pulse Width Modulator,
Watchdog Timer Capabilities
High-Speed Architecture
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40 MHz in standard mode
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Asynchronous port reset
Full duplex Enhanced UART
Low EMI (inhibit ALE)
20 MHz in X2 mode (6 clocks/machine cycle)
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64K bytes on-chip Flash program / data Memory
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Byte and page (128 bytes) erase and write
10k write cycles
Hardware Watchdog Timer (One-time enabled with
Reset-Out)
On-chip 1024 bytes expanded RAM (XRAM)
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Power control modes:
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Software selectable size (0, 256, 512, 768, 1024
bytes)
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Idle Mode.
Power-down mode.
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768 bytes selected at reset for T87C51RD2
compatibility
Rev. F - 15 February, 2001
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