SY10EL31ZCTR

更新时间： 2024-01-11 13:03:50

品牌	Logo	应用领域
麦瑞 - MICREL		触发器
页数	文件大小	规格书
4页	51K
描述
D FLIP-FLOP WITH SET AND RESET

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数据手册

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SY10EL31ZCTR 数据手册

D FLIP-FLOP

WITH SET AND RESET

SY10EL31

SY100EL31

FEATURES

DESCRIPTION

■ 475ps propagation delay

The SY10/100EL31 are D flip-flops with set and reset.

The devices are functionally equivalent to the E131

devices, with higher performance capabilities. With

propagation delays and output transition times

significantly faster than the E131, the EL31 is ideally

suited for those applications which require the ultimate

in AC performance.

■ 2.8GHz toggle frequency

■ Internal 75KΩ input pull-down resistors

■ Available in 8-pin SOIC package

Both the set and reset inputs are asynchronous, level

triggered signals. Data enters the master portion of the

flip-flop when the clock is LOW and is transferred to the

slave, and thus the outputs, upon a positive transition of

the clock.

PIN NAMES

PIN CONFIGURATION/BLOCK DIAGRAM

Function

Data Inputs

Data Outputs

Set

VCC

Reset

Flip-Flop

CLK

Clock Input

CLK

VEE

(1)

TRUTH TABLE

SOIC

TOP VIEW

CLK

Undef

NOTE:

1. Z = LOW-to-HIGH transition.

Rev.: E

Amendment:/0

Issue Date: August, 1998

12 3 4

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