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STE10

更新时间: 2022-11-26 03:34:01
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 控制器PC以太网局域网(LAN)标准以太网:16GBASE-T
页数 文件大小 规格书
66页 402K
描述
PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY 5V

STE10 数据手册

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STE10/100  
PCI 10/100 ETHERNET CONTROLLER  
WITH INTEGRATED PHY (5V)  
PRODUCT PREVIEW  
1.0 DESCRIPTION  
The STE10/100 is a high performance PCI Fast Eth-  
ernet controller with integrated physical layer inter-  
face for 10BASE-T and 100BASE-TX application.  
It was designed with advanced CMOS technology to  
provide glueless 32-bit bus master interface for PCI  
bus, boot ROM interface, CSMA/CD protocol for Fast  
Ethernet, as well as the physical media interface for  
100BASE-TX of IEEE802.3u and 10BASE-T of  
IEEE802.3. The auto-negotiation function is also  
supported for speed and duplex detection.  
PQFP128 (14x20x2.7mm)  
ORDERING NUMBER: STE10/100  
PCI bus interface Rev. 2.2 compliant  
The STE10/100 provides both half-duplex and full-  
duplex operation, as well as support for full-duplex  
flow control. It provides long FIFO buffers for trans-  
mission and receiving, and early interrupt mecha-  
nism to enhance performance. The STE10/100 also  
supports ACPI and PCI compliant power manage-  
ment function.  
ACPI and PCI power management standard  
compliant  
Support PC99 wake on LAN  
2.2 FIFO  
Provides independent transmission and  
receiving FIFOs, each 2k bytes long  
2.0 FEATURES  
Pre-fetches up to two transmit packets to  
minimize inter frame gap (IFG) to 0.96us  
2.1 Industry standard  
Retransmits collided packet without reload from  
host memory within 64 bytes.  
IEEE802.3u 100BASE-TX and IEEE802.3  
10BASE-T compliant  
Automatically retransmits FIFO under-run  
packet with maximum drain threshold until 3rd  
time retry failure without influencing the  
Support for IEEE802.3x flow control  
IEEE802.3u Auto-Negotiation support for  
10BASE-T and 100BASE-TX  
registers and transmit threshold of next packet.  
Figure 1. STE10/100Block Diagram  
Manchester  
Encoder  
10 TX  
Filter  
Flow  
Control  
DMA  
4B/5B  
Transmitter  
Scrambler  
125Mhz  
20Mhz  
TX Freq.  
Synth.  
Auto  
Negotiation  
25Mhz  
Tx FiFo  
Rx FiFo  
+
_
BaseLine  
Restore  
Adaptive  
Equalization  
Descrambler  
5B/4B  
100 clock  
Recovery  
10 clock  
Recovery  
Manchester  
Decoder  
Link  
Polarity  
September 1999  
1/66  
This is preliminary information on a new product now in development. Details are subject to change without notice.  

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