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SNCDC111FN

更新时间： 2024-01-26 22:52:53
品牌 Logo 应用领域
德州仪器 - TI 驱动输出元件逻辑集成电路
页数 文件大小 规格书
7页 96K
描述
CDC SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28

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SNCDC111FN 技术参数

生命周期：ObsoleteReach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.71
Is Samacsys：N其他特性：STROBED OUTPUT; MAX PART TO PART SKEW = 0.1NS
系列：CDC输入调节：DIFFERENTIAL
JESD-30 代码：S-PQCC-J28长度：11.5062 mm
逻辑集成电路类型：LOW SKEW CLOCK DRIVER功能数量：1
反相输出次数：端子数量：28
实输出次数：9最高工作温度：70 °C
最低工作温度：输出特性：OPEN-EMITTER
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装形状：SQUARE封装形式：CHIP CARRIER
最大电源电流（ICC）：80 mA传播延迟（tpd）：0.6 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.05 ns
座面最大高度：4.57 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：ECL
温度等级：COMMERCIAL端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
宽度：11.5062 mmBase Number Matches：1

SNCDC111FN 数据手册

 浏览型号SNCDC111FN的Datasheet PDF文件第2页浏览型号SNCDC111FN的Datasheet PDF文件第3页浏览型号SNCDC111FN的Datasheet PDF文件第4页浏览型号SNCDC111FN的Datasheet PDF文件第5页浏览型号SNCDC111FN的Datasheet PDF文件第6页浏览型号SNCDC111FN的Datasheet PDF文件第7页 
CDC111  
1-LINE TO 9-LINE DIFFERENTIAL LVPECL CLOCK DRIVER  
SCAS321G – SEPTEMBER 1993 – REVISED AUGUST 1999  
FN PACKAGE  
(TOP VIEW)  
Low-Output Skew for Clock-Distribution  
Applications  
Differential Low-Voltage Pseudo-ECL  
(LVPECL)-Compatible Inputs and Outputs  
Distributes Differential Clock Inputs to Nine  
Differential Clock Outputs  
4
3
2 1 28 27 26  
5
25  
24  
23  
22  
21  
20  
19  
Y8  
Y8  
Y7  
Y0  
Y0  
Y1  
Output Reference Voltage, V  
, Allows  
6
REF  
Distribution From a Single-Ended Clock  
Input  
7
8
V
V
CC0  
Y7  
Y6  
Y6  
CC0  
9
Single-Ended LVPECL-Compatible Output  
Enable  
Y1  
Y2  
Y2  
10  
11  
Packaged in Plastic Chip Carrier  
1213 14 15 16 17 18  
description  
The differential LVPECL clock-driver circuit  
distributes one pair of differential LVPECL clock  
inputs (CLKIN, CLKIN) to nine pairs of differential  
clock (Y, Y) outputs with minimum skew for clock  
distribution. It is specifically designed for driving  
50-Ω transmission lines.  
NC – No internal connection  
When the output-enable (OE) is low, the nine differential outputs switch at the same frequency as the differential  
clock inputs. When OE is high, the nine differential outputs are in static states (Y outputs are in the low state,  
Y outputs are in the high state).  
The V  
output can be strapped to the CLKIN input for a single-ended CLKIN input.  
REF  
The CDC111 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
CLKIN CLKIN  
OE  
H
L
Yn  
L
Yn  
H
X
L
X
H
L
L
H
H
L
L
H
L
L
V
V
L
REF  
H
L
H
L
H
H
L
REF  
L
V
V
L
L
REF  
H
L
H
REF  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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