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SN74LVC86AMDREP

更新时间： 2024-02-02 13:16:38
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德州仪器 - TI 输入元件
页数 文件大小 规格书
11页 534K
描述
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE

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SN74LVC86AMDREP 技术参数

是否无铅： 含铅生命周期：Active
Reach Compliance Code：unknown风险等级：5.73
系列：LVC/LCX/ZJESD-30 代码：R-PDSO-G14
JESD-609代码：e0长度：5 mm
逻辑集成电路类型：XOR GATE湿度敏感等级：NOT SPECIFIED
功能数量：4输入次数：2
端子数量：14最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
传播延迟（tpd）：6.5 ns认证状态：COMMERCIAL
座面最大高度：1.2 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：TIN LEAD
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

SN74LVC86AMDREP 数据手册

 浏览型号SN74LVC86AMDREP的Datasheet PDF文件第2页浏览型号SN74LVC86AMDREP的Datasheet PDF文件第3页浏览型号SN74LVC86AMDREP的Datasheet PDF文件第4页浏览型号SN74LVC86AMDREP的Datasheet PDF文件第5页浏览型号SN74LVC86AMDREP的Datasheet PDF文件第6页浏览型号SN74LVC86AMDREP的Datasheet PDF文件第7页 
SN74LVC86A-EP  
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE  
www.ti.com  
SCAS752B–DECEMBER 2003–REVISED JULY 2007  
FEATURES  
•
Controlled Baseline  
•
•
Max tpd of 4.6 ns at 3.3 V  
–
One Assembly/Test Site, One Fabrication  
Site  
Typical VOLP (Output Ground Bounce) <0.8 V  
at VCC = 3.3 V, TA = 25°C  
•
•
Extended Temperature Performance of –40°C  
to 125°C and –55°C to 125°C  
•
Typical VOHV (Output VOH Undershoot) >2 V at  
VCC = 3.3 V, TA = 25°C  
Enhanced Diminishing Manufacturing Sources  
(DMS) Support  
D OR PW PACKAGE  
(TOP VIEW)  
•
•
•
•
Enhanced Product-Change Notification  
(1)  
14  
13  
12  
11  
10  
9
1
2
3
4
5
6
7
1A  
1B  
V
CC  
Qualification Pedigree  
4B  
4A  
4Y  
3B  
3A  
3Y  
Operates From 2 V to 3.6 V  
1Y  
2A  
2B  
2Y  
Inputs Accept Voltages to 5.5 V  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
8
GND  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DESCRIPTION/ORDERING INFORMATION  
The SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7-V to 3.6-V VCC operation.  
The device performs the Boolean function Y = A B or Y = AB + AB in positive logic.  
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced  
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the  
output.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in  
a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
ORDERABLE PART NUMBER  
SN74LVC86AQDREP  
TOP-SIDE MARKING  
LVC86AE  
SOIC – D  
Reel of 2500  
–40°C to 125°C  
–55°C to 125°C  
TSSOP – PW  
SOIC – D  
Reel of 2000  
Reel of 2500  
SN74LVC86AQPWREP  
SN74LVC86AMDREP  
LVC86AE  
LVC86AM  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
FUNCTION TABLE  
(EACH GATE)  
INPUTS  
OUTPUT  
Y
A
L
B
L
L
H
H
L
L
H
L
H
H
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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SN74LVC86AMDREP 替代型号

型号 品牌 替代类型 描述 数据表
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