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SN74LV595APWG4 PDF预览

SN74LV595APWG4

更新时间: 2024-09-29 22:39:11
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
20页 489K
描述
8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

SN74LV595APWG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.19其他特性:PARALLEL OUTPUT IS REGISTERED; UNREGISTERED SERIAL SHIFT RIGHT OUTPUT
计数方向:RIGHT系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:5 mm逻辑集成电路类型:SERIAL IN PARALLEL OUT
最大频率@ Nom-Sup:40000000 Hz湿度敏感等级:1
位数:8功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
传播延迟(tpd):25.5 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Shift Registers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:4.4 mm最小 fmax:45 MHz
Base Number Matches:1

SN74LV595APWG4 数据手册

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ꢀꢁ ꢂꢃ ꢄꢅꢂ ꢆ ꢂ ꢇꢈ ꢀꢁꢉ ꢃꢄꢅ ꢂꢆ ꢂꢇ  
ꢊ ꢋꢌꢍ ꢎ ꢀꢏꢍ ꢐ ꢎ ꢑꢒ ꢓ ꢍꢀ ꢎꢒ ꢑ ꢀ  
ꢔ ꢍꢎ ꢏ ꢕ ꢋꢀꢎꢇꢎ ꢒ ꢖ ꢗꢎ ꢘꢗꢎ ꢑꢒ ꢓ ꢍꢀ ꢎꢒ ꢑ ꢀ  
SCLS414N − APRIL 1998 − REVISED APRIL 2005  
D
D
D
D
D
D
2-V to 5.5-V V  
Operation  
D
I
Supports Partial-Power-Down Mode  
CC  
off  
Operation  
Max t of 7.1 ns at 5 V  
pd  
D
Shift Register Has Direct Clear  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
D
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
A
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
A
Support Mixed-Mode Voltage Operation on  
All Ports  
− 1000-V Charged-Device Model (C101)  
8-Bit Serial-In, Parallel-Out Shift  
SN74LV595A . . . RGY PACKAGE  
(TOP VIEW)  
SN54LV595A . . . FK PACKAGE  
(TOP VIEW)  
SN54LV595A . . . J OR W PACKAGE  
SN74LV595A . . . D, DB, NS,  
OR PW PACKAGE  
(TOP VIEW)  
1
16  
Q
Q
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
3
2
1 20 19  
18  
B
SER  
OE  
Q
4
5
6
7
8
Q
Q
Q
15  
14  
13  
12  
11  
10  
2
3
4
5
6
7
D
Q
SER  
OE  
RCLK  
SRCLK  
SRCLR  
C
D
A
Q
C
D
A
Q
17  
16  
E
Q
SER  
OE  
NC  
NC  
E
Q
E
15 RCLK  
14  
9 10 11 12 13  
Q
F
Q
G
Q
Q
F
Q
12 RCLK  
F
SRCLK  
G
11  
10  
9
Q
SRCLK  
SRCLR  
G
Q
H
Q
H
8
9
GND  
Q
H′  
NC − No internal connection  
description/ordering information  
The ’LV595A devices are 8-bit shift registers designed for 2-V to 5.5-V V  
operation.  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
QFN − RGY  
SOIC − D  
Reel of 1000  
Tube of 40  
SN74LV595ARGYR  
SN74LV595AD  
LV595A  
LV595A  
Reel of 2500  
Reel of 2000  
Reel of 2000  
Tube of 90  
SN74LV595ADR  
SN74LV595ANSR  
SN74LV595ADBR  
SN74LV595APW  
SN74LV595APWR  
SN74LV595APWT  
SNJ54LV595AJ  
SOP − NS  
74LV595A  
LV595A  
−40°C to 85°C  
SSOP − DB  
Reel of 2000  
Reel of 250  
Tube of 25  
TSSOP − PW  
LV595A  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54LV595AJ  
SNJ54LV595AW  
SNJ54LV595AFK  
−55°C to 125°C  
Tube of 150  
Tube of 55  
SNJ54LV595AW  
SNJ54LV595AFK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2005, Texas Instruments Incorporated  
ꢗ ꢁ ꢄꢒꢀꢀ ꢖ ꢎꢏ ꢒꢑꢔ ꢍꢀ ꢒ ꢁ ꢖꢎꢒꢙ ꢚꢛ ꢜꢝ ꢞꢟꢠ ꢡꢢꢣ ꢤꢚ ꢠꢟ ꢤꢚꢥ ꢜꢤꢝ ꢘꢑ ꢖ ꢙ ꢗ ꢦꢎ ꢍꢖ ꢁ  
ꢩꢥ ꢨ ꢥ ꢢ ꢣ ꢚ ꢣ ꢨ ꢝ ꢬ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LV595APWG4 替代型号

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