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Datasheet > SN74HC393N-00
SN74HC393N-00 PDF预览

SN74HC393N-00

更新时间： 2024-02-06 16:43:06
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
23页 1181K
描述
HC/UH SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDIP14

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中文翻译

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SN74HC393N-00 技术参数

生命周期：ObsoleteReach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.03
Is Samacsys：N计数方向：UP
系列：HC/UHJESD-30 代码：R-PDIP-T14
长度：19.305 mm负载电容（CL）：50 pF
负载/预设输入：YES逻辑集成电路类型：BINARY COUNTER
工作模式：ASYNCHRONOUS位数：4
功能数量：2端子数量：14
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
传播延迟（tpd）：72 ns认证状态：Not Qualified
座面最大高度：5.08 mm最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
触发器类型：NEGATIVE EDGE宽度：7.62 mm
最小 fmax：25 MHzBase Number Matches：1

SN74HC393N-00 数据手册

 浏览型号SN74HC393N-00的Datasheet PDF文件第2页浏览型号SN74HC393N-00的Datasheet PDF文件第3页浏览型号SN74HC393N-00的Datasheet PDF文件第4页浏览型号SN74HC393N-00的Datasheet PDF文件第5页浏览型号SN74HC393N-00的Datasheet PDF文件第6页浏览型号SN74HC393N-00的Datasheet PDF文件第7页 
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SCLS143D − DECEMBER 1982 − REVISED JULY 2003  
SN54HC393 . . . J OR W PACKAGE  
SN74HC393 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
Low Power Consumption, 80-µA Max I  
CC  
1CLK  
1CLR  
V
CC  
13 2CLK  
1
2
3
4
5
6
7
14  
Typical t = 13 ns  
pd  
4-mA Output Drive at 5 V  
12  
11  
10  
9
1Q  
1Q  
2CLR  
A
B
C
D
Low Input Current of 1 µA Max  
Dual 4-Bit Binary Counters With Individual  
Clocks  
2Q  
2Q  
2Q  
2Q  
A
B
C
D
1Q  
1Q  
8
D
Direct Clear for Each 4-Bit Counter  
GND  
D
Can Significantly Improve System  
Densities by Reducing Counter Package  
Count by 50 Percent  
SN54HC393 . . . FK PACKAGE  
(TOP VIEW)  
description/ordering information  
The ’HC393 devices contain eight flip-flops and  
additional gating to implement two individual 4-bit  
counters in a single package. These devices  
comprise two independent 4-bit binary counters,  
each having a clear (CLR) and a clock (CLK)  
input. N-bit binary counters can be implemented  
with each package, providing the capability of  
divide by 256. The ’HC393 devices have parallel  
outputs from each counter stage so that any  
submultiple of the input count frequency is  
available for system timing signals.  
3
2
1
20 19  
18  
2CLR  
NC  
1Q  
4
5
6
7
8
A
NC  
17  
16  
15  
14  
2Q  
A
NC  
1Q  
B
NC  
2Q  
B
1Q  
C
9 10 11 12 13  
NC − No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube of 25  
Tube of 50  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 90  
Reel of 2000  
Reel of 250  
Tube of 25  
Tube of 150  
Tube of 55  
SN74HC393N  
SN74HC393N  
SN74HC393D  
SN74HC393DR  
SN74HC393DT  
SN74HC393NSR  
SN74HC393DBR  
SN74HC393PW  
SN74HC393PWR  
SN74HC393PWT  
SNJ54HC393J  
HC393  
SOP − NS  
HC393  
HC393  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
HC393  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC393J  
SNJ54HC393W  
SNJ54HC393FK  
SNJ54HC393W  
SNJ54HC393FK  
−55°C to 125°C  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2003, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...23

中文翻译

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