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SN54S51W-10 PDF预览

SN54S51W-10

更新时间: 2024-11-20 15:51:59
品牌 Logo 应用领域
德州仪器 - TI 输入元件逻辑集成电路
页数 文件大小 规格书
21页 980K
描述
S SERIES, DUAL 4-INPUT AND-OR-INVERT GATE, CDFP14

SN54S51W-10 技术参数

生命周期:Obsolete包装说明:DFP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.41系列:S
JESD-30 代码:R-GDFP-F14长度:9.21 mm
负载电容(CL):15 pF逻辑集成电路类型:AND-OR-INVERT GATE
功能数量:2输入次数:4
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK最大电源电流(ICC):22 mA
传播延迟(tpd):5.5 ns认证状态:Not Qualified
座面最大高度:2.03 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:MILITARY端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
宽度:6.29 mmBase Number Matches:1

SN54S51W-10 数据手册

 浏览型号SN54S51W-10的Datasheet PDF文件第2页浏览型号SN54S51W-10的Datasheet PDF文件第3页浏览型号SN54S51W-10的Datasheet PDF文件第4页浏览型号SN54S51W-10的Datasheet PDF文件第5页浏览型号SN54S51W-10的Datasheet PDF文件第6页浏览型号SN54S51W-10的Datasheet PDF文件第7页 
SN5451, SN54LS51, SN54S51  
SN7451, SN74LS51, SN74S51  
AND-OR-INVERT GATES  
SDLS113 – DECEMBER 1983 – REVISED MARCH 1988  
Copyright 1988, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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