Datasheet > SM74014MA

SM74014MA

更新时间： 2024-01-14 19:37:45

品牌	Logo	应用领域
德州仪器 - TI		驱动光电二极管接口集成电路
页数	文件大小	规格书
15页	422K
描述
HALF BRIDGE BASED PRPHL DRVR, PDSO8, SOIC-8

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技术参数
数据手册

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SM74014MA 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.84
接口集成电路类型：	HALF BRIDGE BASED MOSFET DRIVER	JESD-30 代码：	R-PDSO-G8
端子数量：	8	封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
认证状态：	Not Qualified	表面贴装：	YES
端子形式：	GULL WING	端子位置：	DUAL
Base Number Matches：	1

SM74014MA 数据手册

Symbol

Parameter

Conditions

I_HO= 100 mA

Min

Typ

Max

Units

HO GATE DRIVER

V_OLH

V_OHH

Low-Level Output Voltage

High-Level Output Voltage

0.25

0.35

0.4

I_HO= –100 mA,

0.55

V_OHH= V_HB– V_HO

I_OHH

I_OLH

Peak Pullup Current

V_HO= 0V

1.6

1.8

Peak Pulldown Current

V_HO= 12V

THERMAL RESISTANCE

Junction to Ambient

SOIC-8

170

°C/W

θ_JA

LLP-10 (Note 3)

Switching Characteristics Specifications in standard typeface are for T_J= +25°C, and those in boldface

type apply over the full operating junction temperature range. Unless otherwise specified, V_DD= V_HB= 12V, V_SS= V_HS= 0V,

No Load on LO or HO .

Symbol

t_LPHL

Parameter

Conditions

Min

Typ

Max

Units

Lower Turn-Off Propagation Delay (IN Rising

to LO Falling)

t_HPHL

Upper Turn-Off Propagation Delay (IN Falling

to HO Falling)

t_RC, t_FC

t_R, t_F

Either Output Rise/Fall Time

C_L= 1000 pF

µs

Either Output Rise/Fall Time

(3V to 9V)

C_L= 0.1 µF

0.6

t_BS

Bootstrap Diode Turn-Off Time

I_F= 20 mA, I_R= 200 mA

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation

of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,

see the Electrical Characteristics tables.

Note 2: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. 2 kV for all pins except Pin 2, Pin 3 and Pin 4 which are

rated at 500V.

Note 3: 4 layer board with Cu finished thickness 1.5/1/1/1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50 x 50mm ground and power

planes embedded in PCB. See Application Note AN-1187.

Note 4: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical

Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).

Note 5: The θ_JAis not a given constant for the package and depends on the printed circuit board design and the operating environment.

www.national.com

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