Datasheet > SL18860DCT

SL18860DCT

更新时间： 2024-01-19 19:04:45

品牌	Logo	应用领域
芯科 - SILICON		/
页数	文件大小	规格书
12页	269K
描述
3-Channel Clock Distribution Buffer

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SL18860DCT 数据手册

SL18860DC

3-Channel Clock Distribution Buffer

Key Features

Description

The SL18860DC product is a high performance 3 output

clock distribution buffer and provides 3 outputs from a

single input clock by using SLI proprietary low phase

noise and low power dissipation circuit design.

•

Low current consumption

- 2.7mA-typ (VDD=1.8V and CL=0)

1.7V to 3.65V power supply operation

10MHz to 52MHz CLKIN

Supports LVCMOS and clipped sine wave inputs

Suports 3 single-ended LVCMOS square wave

outputs

OE1/2/3 functions for each CLKOUT1/2/3 outputs

OE_OSC control pin to enable external TCXO/XO

Ultra-Low phase noise

•

The SL18860DC can be used in baseband mobile RF

applications including WLAN, Bluetooth and DVB-H as an

input clock reference. The product designed to isolate

each device driven by their clock outputs to minimize

interference between these devices.

•

Each of the clock buffer outputs can be individually

disabled by using OE1/2/3 control pins to reduce the

power consumption if the connected device does not need

the clock. The device operates from single power supply

from 1.7V to 3.65V and from -40 ºC to 85 ºC.

Ultra low standby current

10-pin TDFN package (1.4x2.0x0.75 mm)

Industrial -40 ºC to 85 ºC temperature range

Application

Benefits

•

Fast Time-to-market

Cost Reduction

Low Power Dissipation

Low Phase Noise

•

Smart Mobile Handsets

Multi-mode RF Clock Distribution

Baseband Peripheral Clock Distribution

Block Diagram

CLKOUT1

CLKOUT2

CLKIN

OE_OSC

10 CLKOUT3

CONTROL LOGIC

OE1

OE2

OE3

VDD

VSS

Rev 1.8, March 16 , 2012

400 West Cesar Chavez, Austin, TX 78701

Page 1 of 12

1+(512) 416-8500

1+(512) 416-9669

www.silabs.com

12 3 4 5 6 7...12

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SL18860DCT 替代型号

型号	品牌	替代类型	描述	数据表
SL18860DC	SILICON	类似代替	3-Channel Clock Distribution Buffer

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