SEMICONDUCTOR TECHNICAL DATA
The SC931 is a 3.3V compatible, PLL based clock driver device targeted for high performance clock applications. With output
frequencies of up to 140MHz and output skews of 300ps the SC931 is ideal for the most demanding clock distribution designs.
The device employs a fully differential PLL design to minimize cycle to cycle and long term jitter. This parameter is of significant
importance when the clock driver is providing the reference clock for PLL’s on board todays microprocessors and ASiC’s. The
device offers 6 low skew outputs, and a choice between internal or external feedback. The feedback option adds to the flexibility
of the device, providing numerous input to output frequency relationships.
• Differential LVPECL Reference Input
• Fully Integrated PLL
• Output Shut Down Mode
• Output Frequency up to 140MHz
FA SUFFIX
32–LEAD TQFP PACKAGE
CASE 873A–02
• Compatible with PowerPC and Intel Microprocessors
• 32–Lead TQFP Packaging
• Power Down Mode
• ±100ps Typical Cycle–to–Cycle Jitter
The SC931 offers two power saving features for power conscious portable or “green” designs. The power down pin will
seemlessly reduce all of the clock rates by one half so that the system will run at half the potential clock rate to extend battery life.
The POWER_DN pin is synchronized internally to the slowest output clock rate. This allows the transition in and out of the
power–down mode to be output glitch free. In addition, the shut down control pins will turn off various combinations of clock
outputs while leaving a subset active to allow for total processor shut down while maintaining system monitors to “wake up” the
system when signaled. During shut down, the PLL will remain locked, if internal feedback is used, so that wake up time will be
minimized. The shut down and power down pins can be combined for the ultimate in power savings. The Shut_Dn pins are
synchronized to the clock internal to the chip to eliminate the possibility of generating runt pulses.
An internal feedback divide by 8 of the VCO frequency is compared with the input reference provided. The internal VCO is
running at 8x the input reference clock. The outputs can be configured to run at 4x, 2x, 1.25x or 0.66x the input reference
frequency. If the external feedback is selected, one of the SC931’s outputs must be connected to the Ext_FB pin. Using the
external feedback, numerous input/output frequency relationships can be developed.
The SC931 is fully 3.3V compatible and requires no external loop filter components. All control inputs accept LVCMOS or
LVTTL compatible levels while the outputs provide LVCMOS levels with the capability to drive terminated 50Ω transmission lines.
For series terminated applications, each output can drive two 50Ω transmission lines, effectively increasing the fanout to 1:12.
The device is packaged in a 32–lead TQFP package to provide the optimum combination of board density and cost.
PowerPC is a trademark of International Business Machines Corporation. Pentium is a trademark of Intel Corporation.
This document contains information on a product under development. Motorola reserves the right to change or
discontinue this product without notice.
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Motorola, Inc. 1998