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SC28L201

更新时间: 2024-02-08 01:26:02
品牌 Logo 应用领域
恩智浦 - NXP 先进先出芯片
页数 文件大小 规格书
110页 409K
描述
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO

SC28L201 数据手册

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SC28L201  
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO  
Rev. 01 — 31 October 2005  
Product data sheet  
1. General description  
The SC28L201 is a high performance UART. Its functional and programming features  
closely match but greatly extend those of previous Philips UARTs. Its configuration on  
power-up is similar that of the SC26C92. Its differences from the previous Philips UARTs  
are: 256-character receiver, 256-character transmit FIFOs, 3.3 V and 5 V compatibility,  
8 I/O ports for arbitrating interrupt system and overall faster bus and data speeds and is  
fabricated in an advanced 0.5 micron CMOS process.  
It is a member of the IMPACT line of data communications parts.  
Pin programming will allow the device to operate with either the Motorola or Intel bus  
interface by changing the function of some pins (reset is inverted, DACKN, and IACKN  
enabled, for example).  
The Philips Semiconductors SC28L201 Universal Asynchronous Receiver/Transmitter  
(UART) is a single-chip CMOS-LSI communications device that provides a full-duplex  
asynchronous receiver/transmitter channel in a single package. It interfaces directly with  
microprocessors and may be used in a polled or interrupt driven system. The use of the  
Interrupt system provides intelligent interrupt vectors.  
The operating mode and data format of the channel may be programmed independently.  
Additionally, the receiver and transmitter can select its operating speed as one of  
twenty-seven fixed baud rates; a 16× clock derived from one of two programmable  
counter/timers, or an external 1× or 16× clock. The baud rate generator and counter/timer  
can operate directly from a crystal or from external clock inputs. The ability to  
independently program the operating speed of the receiver and transmitter make the  
UART particularly attractive for dual-speed channel applications such as clustered  
terminal systems and bridges.  
Each receiver and transmitter is buffered by 256-character FIFOs to nearly eliminate the  
potential of receiver overrun, transmitter underrun and to reduce interrupt overhead in  
interrupt driven systems. In addition, a flow control capability (Xon/Xoff and RTS/CTS) is  
provided to disable a remote transmitter when the receiver buffer is full.  
Also provided on the SC28L201 is a multipurpose 8-bit I/O for the channel. These can be  
used as general-purpose I/O ports or can be assigned specific functions (such as clock  
inputs or status and interrupt outputs) under program control. Normally they will be used  
for modem control and DMA interface. All ports have change of state detectors and input  
sections are always active making output signals available to the internal circuits and the  
control processor.  
The SC28L201 is available in a TSSOP48 package. For other package options, contact  
Philips.  

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