SC2615
Complete DDR Power Solution
POWER MANAGEMENT
Description
Features
The SC2615 is a fully integrated, Three in One, Linear
DDR power solution providing power for the VDDQ and
the VTT rails. The SC2615 completely adheres to the
ACPI sleep state power requirements per IntelR
motherboard specifications. A linear regulator controller
provides the high current of the VDDQ during S0, via an
external Power MOSFET, while an internal 1.8A (min) sink/
source regulator supplies the termination voltage.
Single chip solution adheres to ACPI sleep state
requirements using BF_CUT
UVLO on 3.3V and 12V
Internal S3 state LDO for VDDQ supplies 650 mA
Dual thermal shutdown
Fast transient response
Internal VTT regulator Sinks and Sources 1.8A
(Min)
Power good output
18 pin MLP package
In addition to these two blocks, an Internal LDO provides
VDDQ power during S3, capable of sourcing 650 mA.
The SC2615 uses IntelR defined Latched BF_CUT signal
which is also used to drive the external Blocking MOSFET.
Additional logic, two UVLOs and three thermal shutdown
circuits assure reliability of this single chip DDR power
solution. A Power Good Output indicates the rails are in
regulation.
Applications
DDR power solution for IntelR motherboard
applications
High speed data line termination
Graphic cards
Disk drives
A Soft Start/Enable pin assures proper startup and allows
external shutdown control. The MLP package provides
excellent thermal impedance while keeping a small
footprint.
Typical Application Circuit
12V
5V
5V STBY
Cin
1uF
SC2615
16
9
VDDQ
12VCC
5VSBY
3.3VCC
TG
4
11
10
18
17
12
3
15
14
13
7
BF_CUT
PWRGD
BF_CUT
PWRGD
Cout
BF_CUT
PGOOD
NC
NC
SS/EN VDDQSTBY
8
NC
VDDQIN
FB
1
AGND
LGND
VTTSNS
0.1uF
6
VTT
2
5
VTT
VTT
1
www.semtech.com
Revision 2, April 2003