OPERATING
CONSIDERATIONS
SA56
MODES OF OPERATION
The following chart shows the 3 modes of operation.
Mode
CPWM
PWM
DIR
AOUT
BOUT
pin 12
pin 17
pin 16
pins 21, 23
pins 2, 3
2 Quadrant – Analog Mode
Connect ca-
pacitor to set
frequency
Analog control
voltage
Low (SIGGND
)
Control voltage
greater than VREF
(AOUT – BOUT)< 0
average
Control voltage
:
greater than VREF
(BOUT – AOUT)> 0
average
:
(1 – 4V)
voltage
voltage
2 Quadrant – Digital Mode
SIGGND
SIGGND
SIGGND
Modulation In
Modulation In
High (VDD
)
High (VS)
PWM
PWM
High (VS)
DIR
Low (SIGGND
)
4 Quadrant – Digital Mode
High (VDD
)
Modulated In
DIR
4-QUADRANT - ANALOG MODE
2-QUADRANT - DIGITAL MODE
The SA56 can operate in 4-quadrant mode with analog or
digital inputs. In the analog mode, the capacitor from CPWM to
SIGGND sets the frequency of an internal triangular ramp sig-
nal. See Figure 2. An analog voltage applied to the PWM pin
is compared to a 2.5 volt reference within the SA56 thereby
governing the duty cycle of the output. Note that the analog
pin DIR pin 16 is connected to signal ground (SIGGND).
Two-quadrant operation of the FETs is realized by driving
PWM pin 17 of the SA56 with a digital PWM signal supplied
by a microcontroller or DSP, as depicted in Figure 3. When
using a digital modulation signal, connect the CPWM pin to
SIGGND to disable the internal oscillator and its companion
ramp generator.
A digital PWM signal applied to the PWM pin controls the
output duty cycle at one output pin while the other output pin is
held "HIGH". The input at the DIR pin (VDD or SIGGND) governs
the output behavior. If DIR is a logic HIGH, the AOUT output
will be held high and the BOUT output will be switched as the
complement of the PWM input signal. The average output at
AOUT will always be greater than at BOUT. Whereas if DIR is a
logic LOW, the BOUT output will be held "HIGH" and the AOUT
output will be switched.
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Operating in two-quadrant mode reduces switching noise
and power dissipation, but limits the ability to control the motor
at very low speed.
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Two and 4-quadrant operation are possible with the SA56
whendrivenwithadigitalPWMsignalfromamicrocontrolleror
DSP. When using a digital modulation signal, tie the CPWM pin
to SIGGND to disable the internal oscillator and ramp generator.
When operating in the digital mode, pulse widths should be no
less than 100 ns and the switching frequency should remain
less than 500 kHz. This will allow enough time for the output
MOSFETs to reach their full on and off states before receiving
a command to reverse state.
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6APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
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