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SA56004AD

更新时间: 2024-01-03 14:17:55
品牌 Logo 应用领域
恩智浦 - NXP 传感器温度传感器
页数 文件大小 规格书
23页 215K
描述
1 Degrees Celcious accurate, SMBus-compatible, 8-pin, remote/local digital temperature sensor with over temperature alarms

SA56004AD 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active包装说明:3 MM, PLASTIC, SOT-505-1, TSSOP-8
Reach Compliance Code:compliant风险等级:5.84
最大精度(摄氏度):1 Cel主体宽度:3 mm
主体高度:1 mm主体长度或直径:3 mm
外壳:PLASTICJESD-609代码:e0
安装特点:SURFACE MOUNT位数:11
最大工作电流:1 mA最高工作温度:125 °C
最低工作温度:输出接口类型:2-WIRE INTERFACE
封装形状/形式:SQUARE传感器/换能器类型:TEMPERATURE SENSOR,SWITCH/DIGITAL OUTPUT,SERIAL
最大供电电压:5.5 V最小供电电压:3 V
表面贴装:YES端子面层:Tin/Lead (Sn/Pb)
端接类型:SOLDERBase Number Matches:1

SA56004AD 数据手册

 浏览型号SA56004AD的Datasheet PDF文件第3页浏览型号SA56004AD的Datasheet PDF文件第4页浏览型号SA56004AD的Datasheet PDF文件第5页浏览型号SA56004AD的Datasheet PDF文件第7页浏览型号SA56004AD的Datasheet PDF文件第8页浏览型号SA56004AD的Datasheet PDF文件第9页 
Philips Semiconductors  
Product data sheet  
±1 °C accurate, SMBus-compatible, 8-pin, remote/local  
digital temperature sensor with over temperature alarms  
SA56004X  
SMBus INTERFACE AC ELECTRICAL CHARACTERISTICS  
V
DD  
= 3.0 V to 3.6 V; T  
= 0 °C to +125 °C; unless otherwise noted.  
amb  
These specifications are guaranteed by design and not tested in production.  
SYMBOL  
PARAMETER  
CONDITIONS  
= 2.7 V to 5.5 V  
MIN.  
2.2  
TYP.  
MAX.  
UNIT  
V
V
Logic input HIGH voltage for SCLK, SDATA  
Logic input LOW voltage for SCLK, SDATA  
Logic output LOW sink current  
V
V
5
IH  
IL  
DD  
V
= 2.7 V to 5.5 V  
0.8  
V
DD  
I
OL  
ALERT, T_CRIT; V = 0.4 V  
1.0  
6.0  
mA  
mA  
µA  
µA  
pF  
OL  
SDATA; V = 0.6 V  
OL  
I
I
Logic output high leakage current  
Logic input currents  
V
V
= V  
DD  
1.0  
1.0  
OH  
OH  
, I  
IH IL  
= V or GND  
–1.0  
IN  
DD  
C
SMBus input capacitance for SCLK, SDATA  
i
SMBus digital switching characteristics  
The switching characteristics of the SA56004X fully meet or exceed all parameters specified in SMBus version 2.0. The following parameters  
specify the timing between the SCLK and SDATA signals in the SA56004X. They adhere to, but are not necessarily specified as the SMBus  
specifications.  
f
t
t
t
SCLK operating frequency  
SCLK LOW time  
400  
kHz  
µs  
SCLK  
LOW  
HIGH  
BUF  
10% to 10%  
90% to 90%  
4.7  
4.0  
4.7  
5.0  
5.0  
SCLK HIGH time  
µs  
SMBus free time.  
µs  
Delay from SDATA stop to SDATA start  
t
t
t
t
t
Hold time of start condition.  
Delay from SDATA start to first SCLK H-L  
10% of SDATA to 90% of SCLK  
4.0  
300  
µs  
ns  
ns  
ns  
µs  
HD:STA  
HD:DAT  
SU:DAT  
SU:STA  
SU:STO  
Hold time of data.  
Delay from SCLK H-L to SDATA edges  
Set-up time of data in.  
Delay from SDATA edges to SCLK L-H  
250  
250  
4.0  
Set-up time of repeat start condition.  
Delay from SCLK L-H to restart SDATA  
90% to to 90%  
Set-up time of stop condition.  
90% of SCLK to 90% of SDATA  
Delay from SCLK H-L to SDATA stop  
t
t
t
t
Rise time of SCLK and SDATA  
Fall time of SCLK and SDATA  
Output fall time  
1
µs  
ns  
R
300  
250  
35  
F
C = 400 pF; I = 3 mA  
ns  
OF  
L
O
SMBus TIMEOUT.  
25  
ms  
TIMEOUT  
Low period for reset of SMBus  
t
t
R
t
LOW  
t
F
HD:STA  
SCLK  
t
t
HIGH  
t
HD:STA  
SU:STO  
t
SU:STA  
t
t
HD:DAT  
SU:DAT  
SDATA  
t
BUF  
P
S
S
P
SL01204  
Figure 3. Timing measurements.  
6
2004 Oct 06  

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