Datasheet > S71NS-N

S71NS-N

更新时间： 2024-01-31 14:20:06

品牌	Logo	应用领域
飞索 - SPANSION		闪存
页数	文件大小	规格书
13页	576K
描述
MirrorBit㈢ 1.8 Volt-only Simultaneous Read/Write, Burst-mode Multiplexed Flash Memory

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数据手册

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S71NS-N 数据手册

D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )

2. Input/Output Descriptions

Table 2.1 identifies the input and output package connections provided on the device.

Table 2.1 Input/Output Descriptions

Symbol

AMAX – A16

ADQ15 – ADQ0

OE#

Description

Flash

RAM

Address inputs

Multiplexed Address/Data

Output Enable input. Asynchronous relative to CLK for the Burst mode.

WE#

Write Enable input.

Ground

No Connect; not connected internally

Ready output. Indicates the status of the Burst read. The WAIT# pin of the pSRAM is

tied to RDY.

RDY

Clock input. In burst mode, after the initial word is output, subsequent active edges

CLK

of CLK increment the internal address counter. Should be at V or V while in

IL IH

asynchronous mode

Address Valid input. Indicates to device that the valid address is present on the

address inputs.

AVD#

Low = for asynchronous mode, indicates valid address; for burst mode, causes

starting address to be latched.

High = device ignores address inputs

F-RST#

F-WP#

Hardware reset input. Low = device resets and returns to reading array data

Hardware write protect input. At V , disables program and erase functions in the

four outermost sectors. Should be at V for all other conditions.

Accelerated input. At V , accelerates programming; automatically places device in

F-ACC

unlock bypass mode. At V , disables all program and erase functions. Should be at

for all other conditions.

R-CE1#

F-CE#

R-CRE

F-VCC

R-VCC

R-UB#

R-LB#

DNU

Chip-enable input for pSRAM.

Chip-enable input for Flash. Asynchronous relative to CLK for Burst Mode.

Control Register Enable (pSRAM).

Flash 1.8 Volt-only single power supply.

pSRAM Power Supply.

Upper Byte Control (pSRAM).

Lower Byte Control (pSRAM)

Do Not Use

March 26, 2008 S71NS-N_00_A7

S71NS-N MCP Products

1 2 3 456 7 8...13

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与S71NS-N相关器件

型号	品牌	获取价格	描述	数据表
S71NS-N-MCP	SPANSION	获取价格	MirrorBit 1.8 Volt-only Simultaneous Read/Write, Burst-mode Multiplexed Flash Memory
S71PL032J	SPANSION	获取价格	STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
S71PL032J04	SPANSION	获取价格	STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
S71PL032J04-0B	SPANSION	获取价格	STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
S71PL032J04-0F	SPANSION	获取价格	STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
S71PL032J04-0K	SPANSION	获取价格	STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
S71PL032J04BAI0B0	SPANSION	获取价格	Memory Circuit, Flash+SRAM, 2MX16, CMOS, PBGA56, 9 X 7 MM, 1.20 MM HEIGHT, LEAD FREE COMPL
S71PL032J04BAI0B3	SPANSION	获取价格	Memory Circuit, Flash+SRAM, 2MX16, CMOS, PBGA56, 9 X 7 MM, 1.20 MM HEIGHT, LEAD FREE COMPL
S71PL032J04BAI0F0	SPANSION	获取价格	Memory Circuit, Flash+SRAM, 2MX16, CMOS, PBGA56, 9 X 7 MM, 1.20 MM HEIGHT, LEAD FREE COMPL
S71PL032J04BAI0F3	SPANSION	获取价格	Memory Circuit, Flash+SRAM, 2MX16, CMOS, PBGA56, 9 X 7 MM, 1.20 MM HEIGHT, LEAD FREE COMPL

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