Contents
1.0
Introduction..................................................................................................................7
1.1
Terminology...........................................................................................................8
1.1.1 Processor Packaging Terminology...........................................................8
References..........................................................................................................10
1.2
2.0
Electrical Specifications........................................................................................11
2.1
2.2
2.3
System Bus and GTLREF...................................................................................11
Power and Ground Pins ......................................................................................11
Decoupling Guidelines ........................................................................................11
2.3.1 VCC Decoupling.....................................................................................12
2.3.2 System Bus AGTL+ Decoupling.............................................................12
Voltage Identification...........................................................................................12
2.4.1 Phase Lock Loop (PLL) Power and Filter...............................................14
Reserved, Unused Pins, and TESTHI[12:0]........................................................16
System Bus Signal Groups .................................................................................17
Asynchronous GTL+ Signals...............................................................................18
Test Access Port (TAP) Connection....................................................................19
System Bus Frequency Select Signals (BSEL[1:0])............................................19
Maximum Ratings................................................................................................19
Processor DC Specifications...............................................................................20
AGTL+ System Bus Specifications .....................................................................26
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
3.0
Package Mechanical Specifications.................................................................29
3.1
3.2
3.3
3.4
3.5
Package Load Specifications ..............................................................................32
Processor Insertion Specifications ......................................................................33
Processor Mass Specifications ...........................................................................33
Processor Materials.............................................................................................33
Processor Markings.............................................................................................34
4.0
5.0
Pin Listing and Signal Definitions.....................................................................37
4.1
4.2
Processor Pin Assignments ................................................................................37
Alphabetical Signals Reference ..........................................................................53
Thermal Specifications and Design Considerations.................................61
5.1
Thermal Specifications........................................................................................63
5.1.1 Measurements For Thermal Specifications............................................64
5.1.1.1 Processor Case Temperature Measurement ............................64
6.0
Features .......................................................................................................................65
6.1
6.2
Power-On Configuration Options ........................................................................65
Clock Control and Low Power States..................................................................65
6.2.1 Normal State—State 1 ...........................................................................65
6.2.2 AutoHALT Powerdown State—State 2...................................................65
6.2.3 Stop-Grant State—State 3 .....................................................................66
6.2.4 HALT/Grant Snoop State—State 4 ........................................................67
6.2.5 Sleep State—State 5..............................................................................67
6.2.6 Deep Sleep State—State 6 ....................................................................68
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