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PT5042J

更新时间： 2024-01-30 05:17:17
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3页 111K
描述
1.5A SWITCHING REGULATOR, 950kHz SWITCHING FREQ-MAX, PSMA3, SIP-3

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PT5042J 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：,Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.77模拟集成电路 - 其他类型：SWITCHING REGULATOR
最大输入电压：14 V最小输入电压：4.75 V
标称输入电压：5 VJESD-30 代码：R-PSMA-G3
湿度敏感等级：1功能数量：1
端子数量：3最高工作温度：55 °C
最低工作温度：-20 °C最大输出电流：1.5 A
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：MICROELECTRONIC ASSEMBLY峰值回流温度（摄氏度）：215
认证状态：Not Qualified表面贴装：YES
切换器配置：BOOST最大切换频率：950 kHz
技术：HYBRID温度等级：COMMERCIAL
端子形式：GULL WING端子位置：SINGLE
处于峰值回流温度下的最长时间：NOT SPECIFIEDBase Number Matches：1

PT5042J 数据手册

 浏览型号PT5042J的Datasheet PDF文件第2页浏览型号PT5042J的Datasheet PDF文件第3页 
PT5040 Series  
1-A Positive Step-up  
Integrated Switching Regulator  
SLTS026B  
(Revised 12/19/2001)  
Features  
• Wide Input Voltage Range  
• 85% Efficiency  
• Internal Over-Temperature  
Protection  
• Laser-trimmed Output Voltage  
• Soft Start  
Description  
The PT5040 is a series of 3-pin  
boost-voltage Integrated Switching  
Regulators (ISRs). These ISRs are  
designed for use with +5V bus systems  
that require an additional regulated  
+8V to +20V with up to 1A of output  
current. These ISRs are packaged in  
the 3-pin, single in-line pin (SIP)  
package configuration.  
• 5-Pin Mount Option  
(Suffixes L & M)  
Pin-Out Information Ordering Information PT Series Suffix  
(PT1234x)  
PT 5041o = +12 Volts  
PT 5042o = +15 Volts  
PT 5044o = +8 Volts  
PT 5045o = +9 Volts  
PT 5046o = +10 Volts  
PT 5047o = +18 Volts  
PT 5048o = +12.6 Volts  
PT 5049o = +20 Volts  
Pin  
1
Function  
Vin  
Case/Pin  
O rder  
Package  
Configuration  
Suffix  
Code  
*
Standard Application  
Vertical  
Horizontal  
SMD  
Horizontal, 2-pin Tab  
SMD, 2-Pin Tab  
N
A
C
M
L
(EAD)  
2
GND  
Vout  
(EAA)  
(EAC)  
3
+Vin  
+Vout  
1
3
PT5040  
2
(EAM)  
(EAL)  
+
C3  
100µF  
C1  
C2  
* Previously known as package styles 100/110.  
COM  
COM  
(Reference the applicable package code drawing  
for the dimensions and PC board layout)  
C1 = Optional ceramic (1-5µF)  
C2 = Optional ceramic (1-5µF)  
C3 = Required Electrolytic (100µF)  
NOTE: Boost Topology ISRs are not Short-Circuit Protected.  
Specifications (Unless otherwise stated, Ta =25°C, Vin =5V, Io =Iomax, C3 =100µF)  
PT5040 SERIES  
Characteristics  
Symbol  
Conditions  
Min  
Typ  
Max  
Units  
(1)  
(1)  
Output Current  
Io  
Over Vin range  
PT5049  
PT5047  
0.1  
0.1  
—
0.5  
0.6  
1.0  
0.75  
1.5  
1.2  
—
—
—
—
—
PT5041/48  
PT5042  
0.1 (1)  
A
(1)  
0.1  
(1)  
(1)  
PT5044  
0.1  
PT5045/46  
0.1  
–
14  
Input Voltage Range  
Vin  
Over Io range  
Over Vin Range  
4.75  
4.75  
—
—
(Vo 1)  
V
PT5047/5049  
Output Voltage Tolerance  
∆Vo  
(3)  
Ta= -20°C to SOA derating limit  
Over Vin range  
—
—
—
—
—
1.5  
3.0  
1.0  
1.0  
—
%Vo  
%Vo  
%Vo  
%
Line Regulation  
Load Regulation  
Efficiency  
Regline  
Regload  
η
0.5  
0.5  
Iomin ≤ Io ≤ Iomax  
Io=0.5A  
85  
Vo Ripple (pk-pk)  
Transient Response  
Vr  
20MHz bandwidth  
2
5
%Vo  
ttr  
25% load change  
—
—
500  
3.0  
—
µSec  
%Vo  
Vos  
Vo over/undershoot  
5.0  
(2)  
(3)  
Current Limit  
Inrush Current  
Ilim  
—
150  
—
%Iomax  
Iir  
On start up  
—
5.5  
—
A
tir  
—
—
1
mSec  
Switching Frequency  
ƒs  
Over Vin and Io ranges  
Vo<15V  
Vo>15V  
500  
650  
650  
800  
800  
950  
kHz  
Operating Temperature Range  
Thermal Resistance  
Ta  
—
-20  
—
—
40  
+85 (4)  
°C  
θja  
Free Air Convection  
(40-60LFM)  
—
°C/W  
Storage Temperature  
Mechanical Shock  
Ts  
-40  
—
+125  
°C  
Per Mil-STD-883D, Method 2002.3  
1 msec, Half Sine, mounted to a fixture  
—
500  
—
5
G’s  
Mechanical Vibration  
Suffixes N, A, & C  
Suffixes L & M  
—
—
—
—
G’s  
(5)  
Per Mil-STD-883D, 20-2000 Hz  
20  
Weight  
Suffixes N, A, & C  
Suffixes L & M  
—
—
4.5  
6.5  
—
—
grams  
Notes: (1) The ISR will operate at no load with reduced specifications.  
(2) Boost topology ISRs are not short circuit protected.  
(3) The inrush current stated is above the normal input current for the associated output load.  
(4) See Safe Operating Area curves or consult the factory for the appropriate derating  
(5) The tab pins on the 5-pin mount package types (suffixes L & M) must be soldered. For more information see the applicable package outline drawing.  
For technical support and more information, see inside back cover or visit www.ti.com  
123

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