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PT2259_09 PDF预览

PT2259_09

更新时间: 2024-01-13 06:34:35
品牌 Logo 应用领域
普诚科技 - PTC /
页数 文件大小 规格书
15页 402K
描述
Volume Controller IC

PT2259_09 数据手册

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PT2259  
BYTE FORMAT  
Every byte transmitted to the DATA line consists of 8 bits and each byte must be followed by an “acknowledge” bit. The  
MSB is transmitted first.  
ACKNOWLEDGE SIGNAL  
During the ninth clock pulse, the microprocessor puts a resistive “high” level on the DATA line. If the peripheral audio  
processor (PT2259) acknowledges, it will pull the DATA line from a “high” state to a “low” state during this acknowledge  
clock phase so that the DATA line is in a stable “low” state during this clock pulse. Please refer to the diagram below.  
The audio processor that has been address (PT2259) must generate an “acknowledge” signal after receiving each byte  
or the DATA line will remain at the “high” level during the ninth clock pulse.  
TRANSMISSION WITHOUT ACKNOWLEDGE  
If you do not wish the audio processor (PT2259) to detect the “acknowledge” signal, a simpler microprocessor  
transmission method can be used: after PT2259 has received a byte wait for one clock pulse and do not acknowledge it.  
If this approach is used, however, there is a greater chance for faulty operations to occur and noise immunity will be  
decreased.  
I2C START TIME  
When PT2259 is powered on, a short period must elapse before voltage becomes stable. After the power is turned on,  
PT2259 must wait at least 200ms before it is able to send an I2C control signal otherwise control efficacy and normal  
operation will be comprised. Please refer to the diagram below:  
V1.3  
5
July, 2009  

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