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PT2259_09 PDF预览

PT2259_09

更新时间: 2024-01-07 01:35:03
品牌 Logo 应用领域
普诚科技 - PTC /
页数 文件大小 规格书
15页 402K
描述
Volume Controller IC

PT2259_09 数据手册

 浏览型号PT2259_09的Datasheet PDF文件第1页浏览型号PT2259_09的Datasheet PDF文件第2页浏览型号PT2259_09的Datasheet PDF文件第3页浏览型号PT2259_09的Datasheet PDF文件第5页浏览型号PT2259_09的Datasheet PDF文件第6页浏览型号PT2259_09的Datasheet PDF文件第7页 
PT2259  
FUNCTIONAL DESCRIPTION  
I2C BUS INTERFACE  
In PT2259 the DATA and CLK make up the bus interface through which data is transmitted to and from the  
microprocessor.  
DATA VALIDITY  
Data on the DATA line is considered valid and stable only when the CLK signal is in the “high” state. In addition, the  
“high” and “low” states of the DATA line can change only when the CLK signal is in the “low” state. Please refer to the  
diagram below:  
START AND STOP CONDITIONS  
A start condition is activated when:  
1. the CLK signal is set to “high”, and  
2. the DATA signal shifts from “high” to “low”  
A stop condition is activated when:  
1. the CLK signal is set to “high”, and  
2. the DATA signal shifts from “low” to “high”  
Please refer to the timing diagram below:  
V1.3  
4
July, 2009  

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