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PPXS1010VLU64R PDF预览

PPXS1010VLU64R

更新时间: 2022-02-26 10:40:14
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 微控制器
页数 文件大小 规格书
26页 128K
描述
32-bit Power Architecture® Microcontrollers for Entry Level Display Solutions

PPXS1010VLU64R 数据手册

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Features  
2.3  
Package  
The PXD10 microcontrollers are offered in the following packages:  
144 LQFP, 0.5 mm pitch, 20 mm x 20 mm outline  
176 LQFP, 0.5 mm pitch, 24 mm x 24 mm outline  
2.4  
Module features  
2.4.1  
Low-power operation  
PXD10 devices are designed for optimized low-power operation and dynamic power management of the  
core processor and peripherals. Power management features include software-controlled clock gating of  
peripherals and multiple power domains to minimize leakage in low-power modes.  
There are two static low-power modes, STANDBY and STOP, and two dynamic power modes—RUN and  
HALT. Both low power modes use clock gating to halt the clock for all or part of the device. The  
STANDBY mode also uses power gating to automatically turn off the power supply to parts of the device  
to minimize leakage.  
STANDBY mode turns off the power to the majority of the chip to offer the lowest power consumption  
mode. The contents of the cores, on-chip peripheral registers and potentially some of the volatile memory  
are lost. STANDBY mode is configurable to make certain features available with the disadvantage that  
these consume additional current:  
It is possible to retain the contents of the full RAM or only 8 KB.  
It is possible to enable the internal 16 MHz or 128 kHz RC oscillator, the external 4–16 MHz  
oscillator, or the external 32 KHz oscillator.  
It is possible to keep the LCD module active.  
The device can be awakened from STANDBY mode via from any of up to 19 I/O pins, a reset or from a  
periodic wake-up using a low power oscillator.  
STOP mode maintains power to the entire device allowing the retention of all on-chip registers and  
memory, and providing a faster recovery low power mode than the lowest STANDBY mode. There is no  
need to reconfigure the device before executing code. The clocks to the core and peripherals are halted and  
can be optionally stopped to the oscillator or PLL at the expense of a slower start-up time.  
STOP is entered from RUN mode only. Wake-up from STOP mode is triggered by an external event or by  
the internal periodic wake-up, if enabled.  
RUN modes are the main operating mode where the entire device can be powered and clocked and from  
which most processing activity is done. Four dynamic RUN modes are supported—RUN0 - RUN3. The  
ability to configure and select different RUN modes enables different clocks and power configurations to  
be supported with respect to each other and to allow switching between different operating conditions. The  
PXD10 Product Brief, Rev. 1  
Freescale Semiconductor  
5

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