Overview
•
•
Clock Generation Module (MC_CGM) to generate system clock sources and provide a unified
register interface, enabling access to all clock sources
Clock Monitor Unit (CMU) to monitor the integrity of the main crystal oscillator and the PLL and
act as a frequency meter, measuring the frequency of one clock source and comparing it to a
reference clock
•
•
Mode Entry Module (MC_ME) to control the device power mode, i.e., RUN, HALT, STOP, or
STANDBY, control mode transition sequences, and manage the power control, voltage regulator,
clock generation and clock management modules
Reset Generation Module (MC_RGM) to manage reset assertion and release to the device at initial
power-up
•
•
Nexus development interface (NDI) per IEEE-ISTO 5001-2003 Class Two Plus standard
Device/board boundary-scan testing supported per Joint Test Action Group (JTAG) of IEEE (IEEE
1149.1)
•
•
On-chip voltage regulator controller for regulating the 3.3 or 5 V supply voltage down to 1.2 V for
core logic (requires external ballast transistor)
1
The PXD10 microcontrollers are offered in the following packages:
— 144 LQFP, 0.5 mm pitch, 20 mm 20 mm outline
— 176 LQFP, 0.5 mm pitch, 24 mm 24 mm outline
1.6
Details
1.6.1
Low-power operation
PXD10 devices are designed for optimized low-power operation and dynamic power management of the
core processor and peripherals. Power management features include software-controlled clock gating of
peripherals and multiple power domains to minimize leakage in low-power modes.
There are two static low-power modes, STANDBY and STOP, and two dynamic power modes—RUN and
HALT. Both low power modes use clock gating to halt the clock for all or part of the device. The
STANDBY mode also uses power gating to automatically turn off the power supply to parts of the device
to minimize leakage.
STANDBY mode turns off the power to the majority of the chip to offer the lowest power consumption
mode. The contents of the cores, on-chip peripheral registers and potentially some of the volatile memory
are lost. STANDBY mode is configurable to make certain features available with the disadvantage that
these consume additional current:
•
•
It is possible to retain the contents of the full RAM or only 8 KB.
It is possible to enable the internal 16 MHz or 128 kHz RC oscillator, the external 4–16 MHz
oscillator, or the external 32 KHz oscillator.
•
It is possible to keep the LCD module active.
1. See the device comparison table or orderable parts summary for package offerings for each device in the family.
PXD10 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
7
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