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PI74FCT2574TLX PDF预览

PI74FCT2574TLX

更新时间: 2024-02-18 00:47:59
品牌 Logo 应用领域
百利通 - PERICOM 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
6页 256K
描述
Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.173 INCH, PLASTIC, TSSOP-20

PI74FCT2574TLX 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:20
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.63
系列:FCTJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:6.5 mm
逻辑集成电路类型:BUS DRIVER位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):8.5 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

PI74FCT2574TLX 数据手册

 浏览型号PI74FCT2574TLX的Datasheet PDF文件第2页浏览型号PI74FCT2574TLX的Datasheet PDF文件第3页浏览型号PI74FCT2574TLX的Datasheet PDF文件第4页浏览型号PI74FCT2574TLX的Datasheet PDF文件第5页浏览型号PI74FCT2574TLX的Datasheet PDF文件第6页 
PI74FCT374T/534T/574T
(25Series) PI74FCT2374T/2574T
Fast CMOS Octal D  
Registers (3-State)  
ProductFeatures:  
Product Description:  
• PI74FCT374/534/574/2374/2574Tispincompatiblewithbipolar  
FAST™ Series at a higher speed and lower power  
consumption  
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-  
ducedintheCompany’sadvanced 0.6/0.8 micron CMOStechnology,  
achievingindustryleadingspeedgrades.AllPI74FCT2XXXdevices  
have a built-in 25 ohm series resistor on all outputs to reduce noise  
resulting from reflections, thus eliminating the need for an external  
terminating resistor.  
• 25series resistor on all outputs (FCT2XXX only)  
• TTL input and output levels  
• Low ground bounce outputs  
• Extremelylowstaticpower  
• Hysteresis on all inputs  
• Industrial operating temperature range: –40°C to +85°C  
• Packagesavailable:  
The PI74FCT374T/534T/574T and P174FCT2374T/2574T are  
8-bitwideoctalregistersdesignedwitheightD-typeflip-flopswith  
a buffered common clock and buffered 3-state outputs. When  
output enable (OE) is LOW, the outputs are enabled. When OE is  
HIGH, the outputs are in the high impedance state. Input data  
meeting the setup and hold time requirements of the D inputs is  
transferred to the O outputs on the LOW-to-HIGH transition of the  
clock input.  
– 20-pin173milwideplasticTSSOP(L)  
– 20-pin300milwideplasticDIP(P)  
– 20-pin150milwideplasticQSOP(Q)  
– 20-pin150milwideplasticTQSOP(R)  
– 20-pin300milwideplasticSOIC(S)  
Device models available upon request.  
PI74FCT374/2374T and PI74FCT574/2574T Logic Block Diagram  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
CP  
D
D
D
D
D
D
D
D
CP  
CP  
CP  
CP  
CP  
CP  
CP  
CP  
Q
Q
Q
Q
Q
Q
Q
Q
OE  
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O7  
PI74FCT534T Logic Block Diagram  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
CP  
D
D
D
D
D
D
D
D
CP  
CP  
CP  
CP  
CP  
CP  
CP  
CP  
Q
Q
Q
Q
Q
Q
Q
Q
OE  
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O7  
PS2016B  
02/22/00  
1

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