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PI74FCT162952ATA PDF预览

PI74FCT162952ATA

更新时间： 2024-02-14 23:44:59
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
7页 81K
描述
Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TSSOP-56

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PI74FCT162952ATA 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP, TSSOP56,.3,20
针数：56Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.5其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; WITH CLOCK ENABLE
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：FCTJESD-30 代码：R-PDSO-G56
JESD-609代码：e0长度：14 mm
负载电容（CL）：50 pF逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
最大I（ol）：0.024 A位数：8
功能数量：2端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE WITH SERIES RESISTOR
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP56,.3,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
Prop。Delay @ Nom-Sup：10 ns传播延迟（tpd）：10 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：6.1 mmBase Number Matches：1

PI74FCT162952ATA 数据手册

 浏览型号PI74FCT162952ATA的Datasheet PDF文件第2页浏览型号PI74FCT162952ATA的Datasheet PDF文件第3页浏览型号PI74FCT162952ATA的Datasheet PDF文件第4页浏览型号PI74FCT162952ATA的Datasheet PDF文件第5页浏览型号PI74FCT162952ATA的Datasheet PDF文件第6页浏览型号PI74FCT162952ATA的Datasheet PDF文件第7页 
PI74FCT16952T  
PI74FCT162952T
PI74FCT162H952T  
16-Bit Registered Transceivers  
ProductFeatures:  
CommonFeatures:  
Product Description:  
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-  
duced in the Company’s advanced 0.6 micron CMOS technology,  
achieving industry leading speed grades.  
• PI74FCT16952T,PI74FCT162952T,andPI74FCT2H952T  
are high-speed,  
low power devices with high current drive  
• VCC =5V±10%  
ThePI74FCT16952T,PI74FCT162952T,and PI74FCT162H952T  
are 16-bit registered transceivers organized with two sets of eight  
D-type latches with separate input and output controls for each set.  
For data flow from A to B, for example, the A-to-B Enable  
(xCEAB) input must be LOW in order to enter data from xAx. The  
data present on the A port will be clocked on the B register when  
xCLKAB toggles from LOW-to-HIGH. The xOEAB control  
performs the output enable function on the B port. Control of data  
from B to A is similar, but uses the xCEBA, xCLKBA, and xOEBA  
inputs. By connecting the control pins of the two independent  
transceivers together, a full 16-bit operation can be achieved. The  
output buffers are designed with a Power-Off disable allowing  
“live insertion” of boards when used as backplane drivers.  
• Hysteresis on all inputs  
• Packagesavailable:  
– 56-pin240milwideplasticTSSOP(A)  
– 56-pin300milwide plasticSSOP(V)  
PI74FCT16952TFeatures:  
• High output drive: IOH = –32 mA; IOL = 64 mA  
• Power off disable outputs permit “live insertion”  
• Typical VOLP (Output Ground Bounce) < 1.0V  
atVCC =5V,TA =25°C  
PI74FCT162952TFeatures:  
The PI74FCT16952T output buffers are designed with a Power-  
Off disable function allowing “live insertion” of boards when used  
as backplane drivers.  
• Balanced output drivers: ±24 mA  
• Reduced system switching noise  
The PI74FCT162952T has ±24 mA balanced output drivers. It is  
designed with current limiting resistors at its outputs to control the  
output edge rate resulting in lower ground bounce and undershoot.  
This eliminates the need for external terminating resistors for most  
interface applications.  
• Typical VOLP (Output Ground Bounce) < 0.6V  
atVCC =5V,TA =25°C  
PI74FCT162H952TFeatures:  
• Bus Hold retains last active bus state during 3-state  
• Eliminates the need for external pull-up resistors  
The PI74FCT162H952T has “Bus Hold” which retains the input’s  
last state whenever the input goes to high-impedance preventing  
“floating”inputsandeliminatingtheneedforpull-up/downresistors.  
Logic Block Diagram  
1OEBA  
2OEBA  
1CEBA  
2CEBA  
1
CLKBA  
OEAB  
CEAB  
2
CLKBA  
OEAB  
CEAB  
1
2
1
2
1CLKAB  
2CLKAB  
C
C
1A  
0
2A0  
1B  
0
2B0  
D
D
C
C
D
D
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
PS2042A 03/11/96  
1
1234567

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