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PI3B4010N PDF预览

PI3B4010N

更新时间: 2024-01-26 13:03:12
品牌 Logo 应用领域
百利通 - PERICOM 逻辑集成电路
页数 文件大小 规格书
6页 368K
描述
Bus Exchanger, CBTLV/3B Series, 4-Func, 10-Bit, True Output, CMOS, PBGA64, TFBGA-64

PI3B4010N 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:TFBGA, BGA64,11X11,20针数:64
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.92
系列:CBTLV/3BJESD-30 代码:S-PBGA-B64
JESD-609代码:e0长度:7 mm
逻辑集成电路类型:BUS EXCHANGER湿度敏感等级:3
位数:10功能数量:4
端口数量:5端子数量:64
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA64,11X11,20封装形状:SQUARE
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):235
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Other Logic ICs
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.5 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7 mm
Base Number Matches:1

PI3B4010N 数据手册

 浏览型号PI3B4010N的Datasheet PDF文件第2页浏览型号PI3B4010N的Datasheet PDF文件第3页浏览型号PI3B4010N的Datasheet PDF文件第4页浏览型号PI3B4010N的Datasheet PDF文件第5页浏览型号PI3B4010N的Datasheet PDF文件第6页 
ADVANCE INFORMATION - CONFIDENTIAL  
PI3B4010  
3.3V, High-Bandwidth, 40:10-Bit  
DDR Mux/Demux Bus Switch  
ProductFeatures  
ProductDescription  
• R is35ohmsmax.  
• StandardOperatingTemperature:0ºCto+70ºC  
• ChannelONCapacitance:15pFmax.  
PericomSemiconductor’sPI3Bseriesoflogiccircuitsareproduced  
using the Company’s advanced submicron CMOS technology,  
achieving industry-leading performance.  
ON  
• V OperatingRange:+3.0Vto+3.6V  
• Fast switching time: 3ns max.  
• Package options include:  
CC  
ThePI3B4010isa3.3V,10-to40-bitdemultiplexing/multiplexingbus  
switch. It is intended for multiple data or address muxing. Industry  
leading advantages include a propagation delay of 300ps, resulting  
from the 35-ohm channel resistance, and low I/O capacitance. The  
A-port multiplexes to one of four or all outputs allowing a complete  
bank of 10 bits to switch. The switch is bidirectional.  
-
64-ballThinFinePitchBallGridArray(TFBGA)  
Applications  
• DDR DIMM bank switching  
LogicBlockDiagram  
ExpandedBlockDiagram  
10  
10  
B
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
B
B
B
0 0  
0
1
2
0
0
0
A
0
B
B
B
B
3
0
1
2
0
1
1
1
10Ω  
10Ω  
10Ω  
10Ω  
10Ω  
10Ω  
10Ω  
10Ω  
B
0 9  
B
1 0  
B
B
B
B
3
0
1
2
1
2
2
2
B
1 9  
B
2 0  
B
B
B
B
3
0
1
2
2
3
3
3
A
9
B
2 9  
B
3 0  
B
B
B
B
3
0
1
2
3
4
4
4
B
3 9  
SEL  
SEL  
SEL  
SEL  
0
1
2
3
B
B
B
B
3
0
1
2
4
5
5
5
B
B
B
B
3
0
1
2
5
6
6
6
B
B
B
B
3
0
1
2
6
7
7
7
B
B
B
B
3
0
1
2
7
8
8
8
B
B
B
B
3
0
1
2
8
9
9
9
10Ω  
B
9
3
SEL  
SEL  
SEL  
SEL  
0
1
2
3
PXXXX  
02/28/01  
1

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