5秒后页面跳转
PCS3P624Z09BG-08-ST PDF预览

PCS3P624Z09BG-08-ST

更新时间: 2024-02-08 07:59:17
品牌 Logo 应用领域
PULSECORE PCS驱动光电二极管过程控制系统逻辑集成电路
页数 文件大小 规格书
15页 1384K
描述
Clock Generator, 100MHz, CMOS, PDSO16, 0.150 INCH, GREEN, SOIC-16

PCS3P624Z09BG-08-ST 技术参数

生命周期:Obsolete包装说明:0.150 INCH, GREEN, SOIC-16
Reach Compliance Code:unknown风险等级:5.75
JESD-30 代码:R-PDSO-G16长度:9.9 mm
端子数量:16最高工作温度:70 °C
最低工作温度:最大输出时钟频率:100 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
主时钟/晶体标称频率:100 MHz认证状态:Not Qualified
座面最大高度:1.75 mm最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:3.9 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

PCS3P624Z09BG-08-ST 数据手册

 浏览型号PCS3P624Z09BG-08-ST的Datasheet PDF文件第1页浏览型号PCS3P624Z09BG-08-ST的Datasheet PDF文件第2页浏览型号PCS3P624Z09BG-08-ST的Datasheet PDF文件第3页浏览型号PCS3P624Z09BG-08-ST的Datasheet PDF文件第5页浏览型号PCS3P624Z09BG-08-ST的Datasheet PDF文件第6页浏览型号PCS3P624Z09BG-08-ST的Datasheet PDF文件第7页 
PCS3P624Z05B/C and PCS3P624Z09B/C  
Pin Configuration for PCS3P624Z09B/C  
1
16  
DLY_CTRL  
CLKIN  
CLKOUTA4  
15  
2
3
CLKOUTA1  
CLKOUTA2  
14  
13  
12  
CLKOUTA3  
VDD  
4
5
VDD  
GND  
GND  
PCS3P624Z09B/C  
CLKOUTB1 6  
11 CLKOUTB4  
10  
9
CLKOUTB3  
S1  
7
CLKOUTB2  
8
S2  
Pin Description for PCS3P624Z09B/C  
Pin #  
1
Pin Name  
CLKIN1  
Pin Type  
Description  
I
External reference Clock input, 5V tolerant input  
2
CLKOUTA12  
CLKOUTA22  
VDD  
O
O
P
P
O
O
I
Buffered clock Bank A output4  
Buffered clock Bank A output4  
3
4
3.3V supply  
5
GND  
Ground  
Buffered clock Bank B output4  
Buffered clock Bank B output4  
6
CLKOUTB12  
CLKOUTB22  
S23  
7
8
Select input, bit 2.See Select Input Decoding table for PCS3P624Z09 for more details  
9
S13  
I
Select input, bit 1.See Select Input Decoding table for PCS3P624Z09 for more details  
10  
11  
12  
13  
14  
15  
16  
CLKOUTB32  
CLKOUTB42  
GND  
O
O
P
P
O
O
O
Buffered clock Bank B output4  
Buffered clock Bank B output4  
Ground  
VDD  
3.3V supply  
CLKOUTA32  
CLKOUTA42  
DLY_CTRL2  
Buffered clock Bank A output4  
Buffered clock Bank A output4  
External Input-Output Delay control. This pin can be used as clock output  
Notes: 1. Weak pull down  
2. Weak pull-down on all outputs  
3. Weak pull-up on these Inputs  
4. Buffered clock output is Timing-Safe™  
Rev. #1 | Page 4 of 15 | www.onsemi.com  

与PCS3P624Z09BG-08-ST相关器件

型号 品牌 描述 获取价格 数据表
PCS3P624Z09BG-16-SR PULSECORE Clock Generator, 100MHz, CMOS, PDSO16, 0.150 INCH, GREEN, SOIC-16

获取价格

PCS3P624Z09BG-16-ST PULSECORE Clock Generator, 100MHz, CMOS, PDSO16, 0.150 INCH, GREEN, SOIC-16

获取价格

PCS3P624Z09BG-16-TR PULSECORE Clock Generator, 100MHz, CMOS, PDSO16, 4.40 MM, GREEN, TSSOP-16

获取价格

PCS3P624Z09BG-16-TT PULSECORE Clock Generator, 100MHz, CMOS, PDSO16, 4.40 MM, GREEN, TSSOP-16

获取价格

PCS3P624Z09C PULSECORE High Frequency Timing-Safe™ Peak EMI reductio

获取价格

PCS3P624Z09CG-08-SR PULSECORE Clock Generator, 100MHz, CMOS, PDSO16, 0.150 INCH, GREEN, SOIC-16

获取价格