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PCA9538BS PDF预览

PCA9538BS

更新时间: 2024-01-03 20:39:16
品牌 Logo 应用领域
恩智浦 - NXP 并行IO端口微控制器和处理器外围集成电路
页数 文件大小 规格书
18页 201K
描述
8-bit I2C and SMBus low power I/O port with interrupt and reset

PCA9538BS 技术参数

生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN, LCC16,.16SQ,25针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.73
JESD-30 代码:R-XQCC-N16长度:4 mm
位数:8I/O 线路数量:8
端口数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC16,.16SQ,25封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE电源:2.5/5 V
认证状态:Not Qualified座面最大高度:1 mm
子类别:Parallel IO Port最大供电电压:5.5 V
最小供电电压:2.3 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.65 mm端子位置:QUAD
宽度:4 mmuPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches:1

PCA9538BS 数据手册

 浏览型号PCA9538BS的Datasheet PDF文件第2页浏览型号PCA9538BS的Datasheet PDF文件第3页浏览型号PCA9538BS的Datasheet PDF文件第4页浏览型号PCA9538BS的Datasheet PDF文件第6页浏览型号PCA9538BS的Datasheet PDF文件第7页浏览型号PCA9538BS的Datasheet PDF文件第8页 
Philips Semiconductors  
Product data sheet  
8-bit I2C and SMBus low power I/O port  
with interrupt and reset  
PCA9538  
SIMPLIFIED SCHEMATIC OF I/O0 TO I/O7  
DATA FROM  
SHIFT REGISTER  
OUTPUT PORT  
REGISTER DATA  
CONFIGURATION  
REGISTER  
V
DD  
DATA FROM  
SHIFT REGISTER  
Q
D
Q1  
FF  
ESD PROTECTION DIODE  
WRITE  
CONFIGURATION  
PULSE  
D
C
Q
Q
Q
C
K
FF  
I/O0 TO I/O7  
WRITE PULSE  
K
Q2  
OUTPUT  
PORT  
ESD PROTECTION DIODE  
REGISTER  
V
SS  
INPUT PORT  
REGISTER  
INPUT PORT  
REGISTER DATA  
D
Q
FF  
READ PULSE  
Q
C
K
TO INT  
DATA FROM  
SHIFT REGISTER  
POLARITY  
REGISTER DATA  
D
Q
Q
FF  
WRITE  
POLARITY  
PULSE  
C
K
POLARITY  
INVERSION  
REGISTER  
SU01784  
NOTE: At Power-on Reset, all registers return to default values.  
Figure 4. Simplified schematic of I/O0 to I/O7  
I/O port  
When an I/O is configured as an input, FETs Q1 and Q2 are off,  
creating a high-impedance input. The input voltage may be raised  
above V to a maximum of 5.5 V.  
DD  
If the I/O is configured as an output, then either Q1 or Q2 is enabled,  
depending on the state of the output port register. Care should be  
exercised if an external voltage is applied to an I/O configured as an  
output because of the low impedance paths that exist between the  
pin and either V or V  
.
SS  
DD  
5
2004 Oct 05  

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