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PCA9536DT PDF预览

PCA9536DT

更新时间: 2024-02-22 05:18:38
品牌 Logo 应用领域
德州仪器 - TI 并行IO端口微控制器和处理器外围集成电路光电二极管
页数 文件大小 规格书
25页 476K
描述
REMOTE 4-BIT I2C AND SMBus I/O EXPANDER WITH CONFIGURATION REGISTERS

PCA9536DT 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:BGA
包装说明:VFBGA, BGA8,2X4,20针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.71
JESD-30 代码:R-XBGA-B8JESD-609代码:e1
长度:1.98 mm湿度敏感等级:1
位数:4I/O 线路数量:4
端口数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:VFBGA
封装等效代码:BGA8,2X4,20封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:2.5/5 V认证状态:Not Qualified
座面最大高度:0.5 mm子类别:Parallel IO Ports
最大供电电压:5.5 V最小供电电压:2.3 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.5 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:0.9 mm
uPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches:1

PCA9536DT 数据手册

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PCA9536  
REMOTE 4-BIT I2C AND SMBus I/O EXPANDER  
WITH CONFIGURATION REGISTERS  
www.ti.com  
SCPS125CAPRIL 2006REVISED NOVEMBER 2006  
Register Descriptions  
The Input Port register (register 0) reflects the incoming logic levels of the pins, regardless of whether the pin is  
defined as an input or an output by the Configuration register. It only acts on read operation. Writes to these  
registers have no effect. The default value, X, is determined by the externally applied logic level.  
Before a read operation, a write transmission is sent with the command byte to instruct the I2C device that the  
Input Port register will be accessed next.  
Register 0 (Input Port Register)  
I7  
1
I6  
I5  
I4  
BIT  
I3  
X
I2  
X
I1  
X
I0  
X
Not Used  
DEFAULT  
1
1
1
The Output Port register (register 1) shows the outgoing logic levels of the pins defined as outputs by the  
Configuration register. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this  
register reflect the value that is in the flip-flop controlling the output selection, not the actual pin value.  
Register 1 (Output Port Register)  
O7  
1
O6  
O5  
O4  
BIT  
O3  
1
O2  
1
O1  
1
O0  
1
Not Used  
DEFAULT  
1
1
1
The Polarity Inversion register (register 2) allows polarity inversion of pins defined as inputs by the Configuration  
register. If a bit in this register is set (written with 1), the corresponding port pin's polarity is inverted. If a bit in  
this register is cleared (written with a 0), the corresponding port pin's original polarity is retained.  
Register 2 (Polarity Inversion Register)  
N7  
N6  
N5  
N4  
BIT  
N3  
0
N2  
0
N1  
0
N0  
0
Not Used  
DEFAULT  
0
0
0
0
The Configuration register (register 3) configures the directions of the I/O pins. If a bit in this register is set to 1,  
the corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this register is  
cleared to 0, the corresponding port pin is enabled as an output.  
Register 3 (Configuration Register)  
C7  
1
C6  
C5  
C4  
BIT  
C3  
1
C2  
1
C1  
1
C0  
1
Not Used  
DEFAULT  
1
1
1
Power-On Reset  
When power (from 0 V) is applied to VCC, an internal power-on reset holds the PCA9536 in a reset condition  
until VCC has reached VPOR. At that time, the reset condition is released and the PCA9536 registers and  
I2C/SMBus state machine initialize to their default states. After that, VCC must be lowered to below 0.2 V and  
then back up to the operating voltage for a power-reset cycle.  
7
Submit Documentation Feedback  

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