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P5CC021XS PDF预览

P5CC021XS

更新时间: 2024-09-28 03:43:47
品牌 Logo 应用领域
恩智浦 - NXP 控制器
页数 文件大小 规格书
18页 80K
描述
Secure dual interface and contact PKI smart card controller

P5CC021XS 技术参数

生命周期:Active零件包装代码:MODULE
包装说明:MODULE-8针数:8
Reach Compliance Code:compliantHTS代码:8542.31.00.01
风险等级:5.64JESD-30 代码:R-XDMA-X8
端子数量:8最高工作温度:85 °C
最低工作温度:-25 °C封装主体材料:UNSPECIFIED
封装等效代码:MODULE(UNSPEC)封装形状:RECTANGULAR
封装形式:MICROELECTRONIC ASSEMBLY电源:1.8/5 V
认证状态:Not Qualified子类别:Other Microprocessor ICs
表面贴装:NO技术:CMOS
温度等级:OTHER端子形式:UNSPECIFIED
端子位置:DUALuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

P5CC021XS 数据手册

 浏览型号P5CC021XS的Datasheet PDF文件第2页浏览型号P5CC021XS的Datasheet PDF文件第3页浏览型号P5CC021XS的Datasheet PDF文件第4页浏览型号P5CC021XS的Datasheet PDF文件第5页浏览型号P5CC021XS的Datasheet PDF文件第6页浏览型号P5CC021XS的Datasheet PDF文件第7页 
P5Cx012/02x/40/73/80/144  
family  
Secure dual interface and contact PKI smart card controller  
Rev. 03 — 24 January 2008  
Objective short data sheet  
1. General description  
1.1 SmartMX family approach  
The new CMOS14 SmartMX family members feature a modular set of devices with:  
12 KB to 144 KB EEPROM  
200 KB user ROM  
6144 B RAM  
High-performance secured Public Key Infrastructure (PKI) coprocessor (RSA, ECC)  
Secured dual/triple-DES coprocessor  
Secured AES coprocessor  
Memory Management Unit (MMU)  
ISO/IEC 7816 contact interface  
Optional ISO/IEC 14443 A Contactless Interface Unit (CIU)  
Optional S2C interface for NFC communication link  
5-metal-layer 0.14 µm CMOS technology  
EEPROM with typical 500000 cycles endurance and minimum 20 years retention time  
Broad spectrum of delivery types  
Optional certified crypto library modules for RSA, ECC, DES, AES, SHA and PRNG  
1.2 SmartMX family properties  
The long-term approved SmartMX family features a significantly enhanced secure smart  
card IC architecture. Extended instructions for Java and C code, linear addressing, high  
speed at low power and a universal memory management unit are among many other  
improvements added to the classic 80C51 core architecture. The technology transfer step  
from 5-metal-layer 0.18 µm to 5-metal-layer 0.14 µm CMOS technology offers now even  
more advantages in terms of security features, memory resources, crypto coprocessor  
calculation speed for RSA and ECC as well as availability of secure hardware support for  
2/3-key Digital Encryption Standard (DES) and Advanced Encryption Standard (AES)  
operations.  
The availability of contact interface, optional contactless or S2C interface enables the easy  
implementation of native or open platform and multi-application operating systems in  
market segments like e.g. banking, E-passport, ID card, Health Card, secure access, Java  
card, Near Field Communication (NFC) connectable mobile hand sets as well as Trusted  
Platform Modules (TPM).  

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