Datasheet > P0367WC12F

P0367WC12F

更新时间： 2024-02-23 19:36:33

品牌	Logo	应用领域
力特 - LITTELFUSE		栅栅极
页数	文件大小	规格书
12页	1608K
描述
Silicon Controlled Rectifier, 740A I(T)RMS, 1200V V(DRM), 1200V V(RRM), 1 Element, TO-200AB, 3 PIN

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P0367WC12F 技术参数

是否Rohs认证：	符合	生命周期：	Not Recommended
包装说明：	TO-200AB, 3 PIN	Reach Compliance Code：	compliant
风险等级：	5.32	配置：	SINGLE
最大直流栅极触发电流：	200 mA	JESD-30 代码：	O-CXDB-X3
元件数量：	1	端子数量：	3
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装形状：	ROUND
封装形式：	DISK BUTTON	认证状态：	Not Qualified
最大均方根通态电流：	740 A	断态重复峰值电压：	1200 V
重复峰值反向电压：	1200 V	表面贴装：	YES
端子形式：	UNSPECIFIED	端子位置：	UNSPECIFIED
触发设备类型：	SCR

P0367WC12F 数据手册

Fast turn-off thyristor type P0367WC12#

The total dissipation is now given by:

W_(TOT)= W_(original)+ E ⋅ f

12.2 Determination without Measurement

In circumstances where it is not possible to measure voltage and current conditions, or for design

purposes, the additional losses E in joules may be estimated as follows.

Let E be the value of energy per reverse cycle in joules (curves in Figure 9).

Let f be the operating frequency in Hz

T_SINK

= T_SINK

−

)

(

E ⋅ R_th⋅ f

)

(

new

)

(

original

Where T_{SINK (new)}is the required maximum heat sink temperature and

T_{SINK (original)}is the heat sink temperature given with the frequency ratings.

A suitable R-C snubber network is connected across the thyristor to restrict the transient reverse voltage

to a peak value (V_rm) of 67% of the maximum grade. If a different grade is being used or V_rmis other than

67% of Grade, the reverse loss may be approximated by a pro rata adjustment of the maximum value

obtained from the curves.

12.3 Reverse Recovery Loss by Measurement

This thyristor has a low reverse recovered charge and peak reverse recovery current. When measuring

the charge care must be taken to ensure that:

(a) a.c. coupled devices such as current transformers are not affected by prior passage of high

amplitude forward current.

(b) A suitable, polarised, clipping circuit must be connected to the input of the measuring oscilloscope

to avoid overloading the internal amplifiers by the relatively high amplitude forward current signal

damped snubber, connected across diode anode to cathode. The formula used for the calculation

of this snubber is shown below:

V_r

C_S⋅

R²= 4⋅

Where: V_r= Commutating source voltage

C_S= Snubber capacitance

= Snubber resistance

13.0 Gate Drive

The recommended pulse gate drive is 20V, 20Ω with a short-circuit current rise time of not more than

1µs. This gate drive must be applied when using the full di/dt capability of the device.

The duration of pulse may need to be configured with respect to the application but should be no shorter

than 20µs, otherwise an increase in pulse current could be needed to supply the resulting increase in

charge to trigger.

Data Sheet. Type P0367WC12# Issue K1

Page 5 of 12

August 2012

1 2 3 456 7 8...12

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