ONET1130EC
ZHCSDW5A –JUNE 2015–REVISED JULY 2015
www.ti.com.cn
Pin Functions (continued)
NUMBER
SDA
NAME
Type
DESCRIPTION
2-wire interface serial data input. Requires an external 4.7-kΩ to10-kΩ pull-up resistor
17
Digital-in/out
to VCC. This pin is 3.3-V tolerant.
2-wire interface serial clock input. Requires an external 4.7-kΩ to10-kΩ pull-up
resistor to VCC. This pin is 3.3-V tolerant.
SCK
18
32
4
Digital-in
Digital-in
Analog-in
Disables both bias and modulation currents when set to high state. Includes a 250-kΩ
pull-up resistor to VCC. Requires an external 4.7 kΩ to 10 kΩ pull-up resistor to VCC
for proper operation Toggle to reset a fault condition. This is an ORed function with
the TXBIASEN bit (bit 2 in register 1). This pin is 3.3-V tolerant.
TX_DIS
TXIN+
Non-inverted transmitter data input. On-chip differentially 100 Ω terminated to TXIN–.
Must be AC coupled.
Inverted transmitter data input. On-chip differentially 100 Ω terminated to TXIN+. Must
be AC coupled.
TXIN–
TX_LF
5
9
Analog-in
Analog-in
Transmitter loop filter capacitor.
Transmitter fault detection flag. High level indicates that a fault has occurred. Open
drain output. Requires an external 4.7 kΩ to 10 kΩ pull-up resistor to VCC for proper
operation. This pin is 3.3-V tolerant.
TX_FLT
31
Digital-out
Inverted transmitter data output. Internally terminated in single-ended operation
mode.
TXOUT–
12
CML-out
TXOUT+
VCC_RX
VCC_TX
VDD
13
27, 30
11, 14
15
CML-out
Supply
Supply
Supply
Non-Inverted transmitter data output.
2.5 V ± 5% supply for the receiver.
2.5 V ± 5% supply for the transmitter.
2.5 V ± 5% supply for the digital circuitry.
Exposed die pad. Solder to the PCB.
Exposed Pad
EP
4
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