Datasheet > NM9820EV

NM9820EV

更新时间： 2022-12-22 05:38:51

品牌	Logo	应用领域
其他 - ETC		PC
页数	文件大小	规格书
18页	121K
描述
Single PCI UART

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

NM9820EV 数据手册

Nm9820

NetMos

Technology

Single PCI UART

Pin Name

128

Type

Description

nPERR

Parity Error (three-state). Is used to report parity errors during all PCI

transactions except a Special Cycle. The minimum duration of nPERR is

one clock cycle.

nSERR

PAR

System Error (open drain). This pin goes low when address parity errors are

detected.

I/O

Even Parity. Parity is even parity across AD31-0 and nC/BE3-0. PAR is stable

and valid one clock after the address phase. For data phase PAR is stable

and valid one clock after either nIRDY is asserted on a write transaction or

nTRDY is asserted on a read transaction.

nC/BE3

nC/BE2

nC/BE1

nC/BE0

Bus Command and Byte Enable. During the address phase of a transaction,

nC/BE3-0 defines the bus command. During data phase nC/BE3-0 are used

as Byte Enables.nC/BE3 applies to byte “3”.

Bus Command and Byte Enable. During the address phase of a transaction,

nC/BE3-0 defines the bus command. During data phase nC/BE3-0 are used

as Byte Enables. nC/BE2 applies to byte “2”.

Bus Command and Byte Enable. During the address phase of a transaction,

nC/BE3-0 defines the bus command. During data phase nC/BE3-0 are used

as Byte Enables. nC/BE1 applies to byte “1”.

Bus Command and Byte Enable. During the address phase of a transaction,

nC/BE3-0 defines the bus command. During data phase nC/BE3-0 are used

as Byte Enables. nC/BE0 applies to byte “0”.

nINTA

120

115

PCI active low interrupt output (open-drain). This signal goes low (active)

when an interrupt condition occurs.

EE-CS

External EE-Prom chip select (active high). After power on reset, Nm9820

reads the EE-Prom and loads the read-only configuration registers

sequentially from the first 64 bytes in the EE-Prom.

EE-CLK

EE-DI

116

118

117

123

External EE-Prom clock.

External EE-Prom data input.

External EE-Prom data output.

EE-DO

EE-EN

Enable/Disable external EEprom (active high, internal pull-up). External

EEprom can be disabled when this pin is tied to GND or pulled low. When

external EEprom is disabled, the default values for Nm9820 will be loaded

into PCI configuration register.

Page 1-36

Rev. 1.0

1 2 345 6 7...18

下载PDF

与NM9820EV相关器件

型号	品牌	描述	获取价格	数据表
NM9835	ETC	PCI + Dual UART and 1284 Printer Port	获取价格
NM9835CV	ETC	PCI + Dual UART and 1284 Printer Port	获取价格
NM9835EV	ETC	PCI + Dual UART and 1284 Printer Port	获取价格
NMA	CANDD	Isolated 1W Dual Output DC-DC Converters	获取价格
NMA0305DV	MURATA	Analog Circuit	获取价格
NMA0305M	MURATA	Analog Circuit	获取价格