NJG1535HD3

更新时间： 2024-01-08 13:15:23

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NJG1535HD3 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	Reach Compliance Code：	compliant
风险等级：	5.82	Is Samacsys：	N
特性阻抗：	50 Ω	构造：	COMPONENT
最大输入功率 (CW)：	36.02 dBm	最大插入损耗：	0.5 dB
JESD-609代码：	e4	最大工作频率：	2500 MHz
最小工作频率：	100 MHz	最高工作温度：	85 °C
最低工作温度：	-40 °C	射频/微波设备类型：	DIVERSITY SWITCH
端子面层：	Gold (Au) - with Nickel (Ni) barrier	最大电压驻波比：	1.4
Base Number Matches：	1

NJG1535HD3

■ TERMINAL INFORMATION

No.

SYMBOL

VCTL

DESCRIPTION

Control signal input terminal. This terminal is set to High-Level (+2V~VDD)

or Low-Level (0~+0.8V).

Positive voltage supply terminal. The positive voltage (+2.5~+5.5V) have to

be supplied. Please connect a bypass capacitor with GND terminal for

excellent RF performance.

Common RF port. The terminal PC is connected with the terminal P1 or the

terminal P2 by the voltage impressed to the terminal VCTL.

In order to block the DC bias voltage of internal circuit, an external

capacitor is required. (50~100MHz:0.01uF, 0.1~0.5GHz: 1000pF,

0.5~2.5GHz: 56pF).

VDD

RF port. This port is connected with PC port by controlling 6th pin (V_CTL(H)

)

to 2.5~VDD. An external capacitor is required to block the DC bias voltage

of internal circuit. (50~100MHz:0.01uF, 0.1~0.5GHz: 1000pF, 0.5~2.5GHz:

56pF)

GND

Ground terminal. Please connect this terminal with ground plane as close

as possible for excellent RF performance.

RF port. This port is connected with PC port by controlling 6^thpin (V_CTL(H)

)

to 0~+0.8. An external capacitor is required to block the DC bias voltage of

internal circuit. (50~100MHz:0.01uF, 0.1~0.5GHz: 1000pF, 0.5~2.5GHz:

56pF)

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