Datasheet > NE555G-S08-T

NE555G-S08-T

更新时间： 2022-11-27 11:19:35

品牌	Logo	应用领域
友顺 - UTC		/
页数	文件大小	规格书
8页	200K
描述
SINGLE TIMER

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NE555G-S08-T 数据手册

NE555

LINEAR INTEGRATED CIRCUIT

TYPICAL APPLICATION NOTES

The application circuit shows astable mode configuration.

Pin 6 (Threshold ) is tied to Pin 2 ( Trigger ) and Pin 4 ( reset ) is tied to V_CC( Pin 8 ). The external capacitor C1 of

Pin 6 and Pin 2 charges through R_A, R_Band dischages through R_Bonly. In the internal circuit of UTC NE555 , one

input of the upper comparator is at voltage of 2/3Vcc(R1=R2=R3),another input is connected to Pin 6.As soon

as C1 is charging to higher than 2/3Vcc, transistor Q1 is turned ON and discharge C1 to collector voltage of

transistor Q1. Therefore, the flip-flop circuit is reset and output is low. One input of lower comparator is at voltage of

1/3Vcc, discharge transistor Q1 turn off and C1 charges through RA and RB. Therefore, the flip-flop circuit is set

output high.

That is, when C1 charges through R_Aand R_B, output is high and when C1 discharge through R_B,output is low.

The charge time(output is high) t1 is 0.693(R_A+R_B) C1 and the discharge time (output is low) T2 is 0.693 R_B*C1.

Vcc− Vcc

⎛

⎜

⎞

⎟

=0.693

⎜

⎟

⎜

⎟

⎠

⎝

T1=0.693*(R_A+R_B)*C1

T2=0.693*R_B*C1

Thus the total period time T is given by

T=T1+T2=0.693(R_A+2R_B)*C1.

Then the frequency of astable mode is given by

1.44

f =

(RA + 2RB) * C1

The duty cycle is given by

R^B

D.C. =

RA + 2RB

UNISONIC TECHNOLOGIES CO., LTD

6 of 8

www.unisonic.com.tw

QW-R106-001,F

1...3 4 567 8

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