N01L63W2A
Timing Test Conditions
Item
0.1VCC to 0.9 VCC
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
5ns
0.5 VCC
CL = 30pF
-40 to +85 oC
Operating Temperature
Timing
2.3 - 3.6 V
2.7 - 3.6 V
Item
Symbol
Units
Min.
Max.
Min.
Max.
tRC
tAA
tCO
tOE
Read Cycle Time
70
55
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
70
70
35
70
55
55
30
55
Chip Enable to Valid Output
Output Enable to Valid Output
Byte Select to Valid Output
Chip Enable to Low-Z output
Output Enable to Low-Z Output
Byte Select to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Byte Select Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
t
LB, tUB
tLZ
10
5
10
5
tOLZ
tLBZ, tUBZ
tHZ
10
0
10
0
20
20
20
20
20
20
tOHZ
0
0
t
LBHZ, tUBHZ
tOH
0
0
10
70
50
50
50
40
0
10
55
40
40
40
40
0
tWC
tCW
Chip Enable to End of Write
Address Valid to End of Write
Byte Select to End of Write
Write Pulse Width
tAW
tLBW, tUBW
tWP
tAS
Address Setup Time
tWR
Write Recovery Time
0
0
tWHZ
tDW
Write to High-Z Output
20
20
Data to Write Time Overlap
Data Hold from Write Time
End Write to Low-Z Output
40
0
35
0
tDH
tOW
5
10
ns
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