Datasheet > N01L63W2A

N01L63W2A

更新时间： 2022-12-23 07:13:53

品牌	Logo	应用领域
安森美 - ONSEMI		静态存储器
页数	文件大小	规格书
10页	218K
描述
1Mb Ultra-Low Power Asynchronous CMOS SRAM 64K × 16 bit

阅读下载

获取价格

如果您发现信息不准确，欢迎纠错

N01L63W2A 数据手册

N01L63W2A

Power Savings with Page Mode Operation (WE = V )

Page Address (A4 - A15)

Word Address (A0 - A3)

Open page

Word 16

Word 1

Word 2

CE1

CE2

LB, UB

Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal

organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power

saving feature.

The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open

and 16-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant

bits and addressing the 16 words within the open page, power is reduced to the page mode value which is

considerably lower than standard operating currents for low power SRAMs.

Rev. 9 | Page 4 of 10 | www.onsemi.com

1 2 345 6 7...10

下载PDF

型号	品牌	描述	获取价格	数据表
N01L63W2AB25I	ONSEMI	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64	获取价格
N01L63W2AB25IT	ONSEMI	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64	获取价格
N01L63W2AB5I	ONSEMI	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64	获取价格
N01L63W2AB5IT	ONSEMI	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64	获取价格
N01L63W2AT25I	ONSEMI	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64	获取价格
N01L63W2AT25IT	ONSEMI	1Mb Ultra-Low Power Asynchronous CMOS SRAM 64	获取价格