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MX27C2048TC-70 PDF预览

MX27C2048TC-70

更新时间: 2024-02-11 07:41:49
品牌 Logo 应用领域
旺宏电子 - Macronix 可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
18页 766K
描述
2M-BIT [256Kx8/128x16] CMOS EPROM

MX27C2048TC-70 数据手册

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MX27C2100/27C2048  
BYTE-WIDE MODE  
The location of the capacitor should be close to where  
the power supply is connected to the array.  
With BYTE/VPP at GND ±0.2V, outputs Q8-15 are tri-  
stated. IfQ15/A-1=VIH, outputsQ0-7presentdatabits  
Q8-15. If Q15/A-1 = VIL, outputs Q0-7 present data bits  
Q0-7.  
STANDBY MODE  
The MX27C2100/2048 has a CMOS standby mode  
which reduces the maximum VCC current to 100 uA. It  
is placed in CMOS standby when CE is at VCC ±0.3 V.  
The MX27C2100/2048 also has a TTL-standby mode  
which reduces the maximum VCC current to 1.5 mA. It  
is placed in TTL-standby when CE is at VIH. When in  
standby mode, the outputs are in a high-impedance  
state, independent of the OE input.  
TWO-LINE OUTPUT CONTROL FUNCTION  
To accommodate multiple memory connections, a two-  
line control function is provided to allow for:  
1. Low memory power dissipation,  
2. Assurance that output bus contention will not  
occur.  
It is recommended that CE be decoded and used as the  
primary device-selecting function, while OE be made a  
common connection to all devices in the array and  
connectedtotheREADlinefromthesystemcontrolbus.  
This assures that all deselected memory devices are in  
their low-power standby mode and that the output pins  
are only active when data is desired from a particular  
memory device.  
SYSTEM CONSIDERATIONS  
During the switch between active and standby  
conditions, transient current peaks are produced on the  
rising and falling edges of Chip Enable. The magnitude  
of these transient current peaks is dependent on the  
outputcapacitanceloadingofthedevice. Ataminimum,  
a0.1uFceramiccapacitor(highfrequency,lowinherent  
inductance) should be used on each device between  
Vcc and GND to minimize transient effects. In addition,  
to overcome the voltage drop caused by the inductive  
effects of the printed circuit board traces on EPROM  
arrays, a 4.7 uF bulk electrolytic capacitor should be  
used between VCC and GND for each eight devices.  
P/N: PM0158  
REV. 4.3, AUG. 22, 2001  
4

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